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74AHCT273PW,112

Description
AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
Categorylogic    logic   
File Size104KB,18 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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74AHCT273PW,112 Overview

AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20

74AHCT273PW,112 Parametric

Parameter NameAttribute value
Brand NameNXP Semiconduc
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeTSSOP2
package instruction4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20
Contacts20
Manufacturer packaging codeSOT360-1
Reach Compliance Codecompli
seriesAHCT/VHCT
JESD-30 codeR-PDSO-G20
JESD-609 codee4
length6.5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Su45000000 Hz
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of digits8
Number of functions1
Number of terminals20
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTUBE
Peak Reflow Temperature (Celsius)260
power supply5 V
propagation delay (tpd)11.5 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
Trigger typePOSITIVE EDGE
width4.4 mm
minfmax65 MHz
74AHC273; 74AHCT273
Octal D-type flip-flop with reset; positive-edge trigger
Rev. 03 — 13 May 2008
Product data sheet
1. General description
The 74AHC273; 74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A.
The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D
inputs and Q outputs.
The common clock (CP) and master reset (MR) inputs, load and reset (clear) all flip-flops
simultaneously.
The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is
transferred to the corresponding output (Qn) of the flip-flop.
All outputs will be forced LOW, independent of clock or data inputs, by a LOW on the MR
input.
The device is useful for applications where only the true output is required and the clock
and master reset are common to all storage elements.
2. Features
I
I
I
I
I
I
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than V
CC
Ideal buffer for MOS microcontroller or memory
Common clock and master reset
Related product versions:
N
74AHC377; 74AHCT377 for clock enable version
N
74AHC373; 74AHCT373 for transparent latch version
N
74AHC374; 74AHCT374 for 3-state version
Input levels:
N
For 74AHC273: CMOS level
N
For 74AHCT273: TTL level
ESD protection:
N
HBM EIA/JESD22-A114E exceeds 2000 V
N
MM EIA/JESD22-A115-A exceeds 200 V
N
CDM EIA/JESD22-C101C exceeds 1000 V
Multiple package options
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
I
I
I
I

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Description AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
Brand Name NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc
Is it Rohs certified? conform to conform to conform to conform to conform to conform to conform to conform to conform to
Maker NXP NXP NXP NXP NXP NXP NXP NXP NXP
Parts packaging code TSSOP2 SOP SOP QFN TSSOP2 TSSOP2 QFN SOP SOP
package instruction 4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20 7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20 SOP, SOP20,.4 2.50 X 4.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT-764-1, DHVQFN-20 4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20 4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20 2.50 X 4.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT-764-1, DHVQFN-20 7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20 7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20
Contacts 20 20 20 20 20 20 20 20 20
Manufacturer packaging code SOT360-1 SOT163-1 SOT163-1 SOT764-1 SOT360-1 SOT360-1 SOT764-1 SOT163-1 SOT163-1
Reach Compliance Code compli compli compli compli compli compli compli compli compli
series AHCT/VHCT AHCT/VHCT AHCT/VHCT AHCT/VHCT/VT AHCT/VHCT AHC AHC/VHC/H/U/V AHC AHC
JESD-30 code R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PQCC-N20 R-PDSO-G20 R-PDSO-G20 R-PQCC-N20 R-PDSO-G20 R-PDSO-G20
JESD-609 code e4 e4 e4 e4 e4 e4 e4 e4 e4
length 6.5 mm 12.8 mm 12.8 mm 4.5 mm 6.5 mm 6.5 mm 4.5 mm 12.8 mm 12.8 mm
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP
Maximum Frequency@Nom-Su 45000000 Hz 45000000 Hz 45000000 Hz 45000000 Hz 45000000 Hz 70000000 Hz 70000000 Hz 70000000 Hz 70000000 Hz
MaximumI(ol) 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A 0.008 A
Humidity sensitivity level 1 1 1 1 1 1 1 1 1
Number of digits 8 8 8 8 8 8 8 8 8
Number of functions 1 1 1 1 1 1 1 1 1
Number of terminals 20 20 20 20 20 20 20 20 20
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output polarity TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SOP SOP HVQCCN TSSOP TSSOP HVQCCN SOP SOP
Encapsulate equivalent code TSSOP20,.25 SOP20,.4 SOP20,.4 LCC20,.1X.18,20 TSSOP20,.25 TSSOP20,.25 LCC20,.1X.18,20 SOP20,.4 SOP20,.4
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE SMALL OUTLINE
method of packing TUBE TUBE TAPE AND REEL TAPE AND REEL TAPE AND REEL TUBE TAPE AND REEL TUBE TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260 260 260 260
power supply 5 V 5 V 5 V 5 V 5 V 2/5.5 V 2/5.5 V 2/5.5 V 2/5.5 V
propagation delay (tpd) 11.5 ns 11.5 ns 11.5 ns 11.5 ns 11.5 ns 21.5 ns 21.5 ns 21.5 ns 21.5 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.1 mm 2.65 mm 2.65 mm 1 mm 1.1 mm 1.1 mm 1 mm 2.65 mm 2.65 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 2 V 2 V 2 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
Terminal form GULL WING GULL WING GULL WING NO LEAD GULL WING GULL WING NO LEAD GULL WING GULL WING
Terminal pitch 0.65 mm 1.27 mm 1.27 mm 0.5 mm 0.65 mm 0.65 mm 0.5 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL QUAD DUAL DUAL QUAD DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30 30 30 30 30 30
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
width 4.4 mm 7.5 mm 7.5 mm 2.5 mm 4.4 mm 4.4 mm 2.5 mm 7.5 mm 7.5 mm
minfmax 65 MHz 65 MHz 65 MHz 65 MHz 65 MHz 100 MHz 100 MHz 100 MHz 100 MHz

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