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IDT74AUC16240PFGI

Description
Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, TVSOP-48
Categorylogic    logic   
File Size100KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric Compare View All

IDT74AUC16240PFGI Overview

Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, TVSOP-48

IDT74AUC16240PFGI Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeSOIC
package instructionTSSOP,
Contacts48
Reach Compliance Codecompliant
seriesAUC
JESD-30 codeR-PDSO-G48
JESD-609 codee3
length9.7 mm
Logic integrated circuit typeBUS DRIVER
Humidity sensitivity level1
Number of digits4
Number of functions4
Number of ports4
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityINVERTED
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)2.6 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.4 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width4.4 mm
IDT74AUC16240
1.8V CMOS 16-BIT BUFFER/DRIVER WITH INVERTED 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
1.8V CMOS 16-BIT BUFFER/
DRIVER WITH INVERTED
3-STATE OUTPUTS
FEATURES:
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• 1.8V Optimized
• 0.8V to 2.7V Operating Range
• Inputs/outputs tolerant up to 3.6V
• ±9mA @ 2.3V output drivers
• Supports hot insertion
• Available in TSSOP, TVSOP, and VFBGA packages
IDT74AUC16240
DESCRIPTION:
This 16-bit buffer/driver is built using advanced CMOS technology. The
AUC16240 is designed specifically to improve the performance and density of
3-state memory address drivers, clock drivers, and bus-oriented recievers and
transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or
one 16-bit buffer. It provides inverted outputs and symmetrical active-low output-
enable (OE) inputs.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the outputs, preventing damaging current backflow
through the device when it is powered down.
To ensure the high-impedance state during power up or power down,
OE
should be tied to V
DD
through a pull-up resistor; the minimum value of the resistor
is determined by the current-sinking capability of the driver.
APPLICATIONS:
• high performance, low voltage communications systems
• high performance, low voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
1
OE
1
A
1
1
A
2
1
A
3
1
A
4
1
Y
1
1
Y
2
1
Y
3
1
Y
4
3
OE
3
A
1
3
A
2
3
Y
1
3
Y
2
3
A
3
3
A
4
3
Y
3
3
Y
4
2
OE
2
A
1
2
A
2
2
A
3
2
A
4
2
Y
1
2
Y
2
2
Y
3
2
Y
4
4
OE
4
A
1
4
A
2
4
A
3
4
A
4
4
Y
1
4
Y
2
4
Y
3
4
Y
4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2002 Integrated Device Technology, Inc.
SEPTEMBER 2002
DSC-6166/3

IDT74AUC16240PFGI Related Products

IDT74AUC16240PFGI IDT74AUC16240BVGI IDT74AUC16240PAGI IDT74AUC16240BVI
Description Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, TVSOP-48 Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PBGA56, VFBGA-56 Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, TSSOP-48 Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PBGA56, VFBGA-56
Is it lead-free? Lead free Lead free Lead free Contains lead
Is it Rohs certified? conform to conform to conform to incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code SOIC BGA TSSOP BGA
package instruction TSSOP, VFBGA-56 TSSOP, TFBGA, BGA56,6X10,25
Contacts 48 56 48 56
Reach Compliance Code compliant compliant compliant not_compliant
series AUC AUC AUC AUC
JESD-30 code R-PDSO-G48 R-PBGA-B56 R-PDSO-G48 R-PBGA-B56
JESD-609 code e3 e1 e3 e0
length 9.7 mm 7 mm 12.5 mm 7 mm
Logic integrated circuit type BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
Number of digits 4 4 4 4
Number of functions 4 4 4 4
Number of ports 4 4 4 4
Number of terminals 48 56 48 56
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity INVERTED INVERTED INVERTED INVERTED
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TFBGA TSSOP TFBGA
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH GRID ARRAY, THIN PROFILE, FINE PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius) 260 260 260 NOT SPECIFIED
propagation delay (tpd) 2.6 ns 2.6 ns 2.6 ns 2.6 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.05 mm 1.2 mm 1.05 mm
Maximum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V 0.8 V 0.8 V
Nominal supply voltage (Vsup) 1.8 V 1.8 V 1.8 V 1.8 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface MATTE TIN TIN SILVER COPPER MATTE TIN Tin/Lead (Sn/Pb)
Terminal form GULL WING BALL GULL WING BALL
Terminal pitch 0.4 mm 0.65 mm 0.5 mm 0.65 mm
Terminal location DUAL BOTTOM DUAL BOTTOM
Maximum time at peak reflow temperature 30 40 30 NOT SPECIFIED
width 4.4 mm 4.5 mm 6.1 mm 4.5 mm
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