IDT74AUC16240PAGI datasheet, PDF

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IDT74AUC16240PAGI: DescriptionBus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, TSSOP-48; Categorylogic logic; File Size100KB，7 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT74AUC16240PAGI Overview

Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, TSSOP-48

IDT74AUC16240PAGI Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSSOP
package instruction	TSSOP,
Contacts	48
Reach Compliance Code	compliant
series	AUC
JESD-30 code	R-PDSO-G48
JESD-609 code	e3
length	12.5 mm
Logic integrated circuit type	BUS DRIVER
Humidity sensitivity level	1
Number of digits	4
Number of functions	4
Number of ports	4
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	INVERTED
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	2.6 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	6.1 mm

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IDT74AUC16240

1.8V CMOS 16-BIT BUFFER/DRIVER WITH INVERTED 3-STATE OUTPUTS

INDUSTRIAL TEMPERATURE RANGE

1.8V CMOS 16-BIT BUFFER/

DRIVER WITH INVERTED

3-STATE OUTPUTS

FEATURES:

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• 1.8V Optimized

• 0.8V to 2.7V Operating Range

• Inputs/outputs tolerant up to 3.6V

• ±9mA @ 2.3V output drivers

• Supports hot insertion

• Available in TSSOP, TVSOP, and VFBGA packages

IDT74AUC16240

DESCRIPTION:

This 16-bit buffer/driver is built using advanced CMOS technology. The

AUC16240 is designed specifically to improve the performance and density of

3-state memory address drivers, clock drivers, and bus-oriented recievers and

transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or

one 16-bit buffer. It provides inverted outputs and symmetrical active-low output-

enable (OE) inputs.

This device is fully specified for partial power-down applications using I

OFF

The I

OFF

circuitry disables the outputs, preventing damaging current backflow

through the device when it is powered down.

To ensure the high-impedance state during power up or power down,

should be tied to V

through a pull-up resistor; the minimum value of the resistor

is determined by the current-sinking capability of the driver.

APPLICATIONS:

• high performance, low voltage communications systems

• high performance, low voltage computing systems

FUNCTIONAL BLOCK DIAGRAM

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE

SEPTEMBER 2002

DSC-6166/3

IDT74AUC16240PAGI Related Products

	IDT74AUC16240PAGI	IDT74AUC16240BVGI	IDT74AUC16240PFGI	IDT74AUC16240BVI
Description	Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, TSSOP-48	Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PBGA56, VFBGA-56	Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, TVSOP-48	Bus Driver, AUC Series, 4-Func, 4-Bit, Inverted Output, CMOS, PBGA56, VFBGA-56
Is it lead-free?	Lead free	Lead free	Lead free	Contains lead
Is it Rohs certified?	conform to	conform to	conform to	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	TSSOP	BGA	SOIC	BGA
package instruction	TSSOP,	VFBGA-56	TSSOP,	TFBGA, BGA56,6X10,25
Contacts	48	56	48	56
Reach Compliance Code	compliant	compliant	compliant	not_compliant
series	AUC	AUC	AUC	AUC
JESD-30 code	R-PDSO-G48	R-PBGA-B56	R-PDSO-G48	R-PBGA-B56
JESD-609 code	e3	e1	e3	e0
length	12.5 mm	7 mm	9.7 mm	7 mm
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
Number of digits	4	4	4	4
Number of functions	4	4	4	4
Number of ports	4	4	4	4
Number of terminals	48	56	48	56
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	INVERTED	INVERTED	INVERTED	INVERTED
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TFBGA	TSSOP	TFBGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260	260	260	NOT SPECIFIED
propagation delay (tpd)	2.6 ns	2.6 ns	2.6 ns	2.6 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1.05 mm	1.2 mm	1.05 mm
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	0.8 V	0.8 V	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	MATTE TIN	TIN SILVER COPPER	MATTE TIN	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	BALL	GULL WING	BALL
Terminal pitch	0.5 mm	0.65 mm	0.4 mm	0.65 mm
Terminal location	DUAL	BOTTOM	DUAL	BOTTOM
Maximum time at peak reflow temperature	30	40	30	NOT SPECIFIED
width	6.1 mm	4.5 mm	4.4 mm	4.5 mm

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