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MC-4R128FKE8D-653

Description
Rambus DRAM Module, 64MX18, MOS, RIMM-184
Categorystorage    storage   
File Size140KB,16 Pages
ManufacturerNEC Electronics
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MC-4R128FKE8D-653 Overview

Rambus DRAM Module, 64MX18, MOS, RIMM-184

MC-4R128FKE8D-653 Parametric

Parameter NameAttribute value
MakerNEC Electronics
package instruction,
Reach Compliance Codeunknown
access modeBLOCK ORIENTED PROTOCOL
Other featuresSELF CONTAINED REFRESH
JESD-30 codeR-XDMA-N184
memory density1207959552 bit
Memory IC TypeRAMBUS DRAM MODULE
memory width18
Number of functions1
Number of ports1
Number of terminals184
word count67108864 words
character code64000000
Operating modeSYNCHRONOUS
organize64MX18
Package body materialUNSPECIFIED
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Certification statusNot Qualified
self refreshYES
Maximum supply voltage (Vsup)2.63 V
Minimum supply voltage (Vsup)2.37 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyMOS
Terminal formNO LEAD
Terminal locationDUAL

MC-4R128FKE8D-653 Preview

DATA SHEET
MOS INTEGRATED CIRCUIT
MC-4R128FKE8D
Direct Rambus
TM
DRAM RIMM
TM
Module
128M-BYTE (64M-WORD x 18-BIT)
Description
The Direct Rambus RIMM module is a general-purpose high-performance memory module subsystem suitable for
use in a broad range of applications including computer memory, personal computers, workstations, and other
applications where high bandwidth and low latency are required.
MC-4R128FKE8D modules consists of four 288M Direct Rambus DRAM (Direct RDRAM™) devices (
µ
PD488588).
These are extremely high-speed CMOS DRAMs organized as 16M words by 18 bits. The use of Rambus Signaling
Level (RSL) technology permits 600MHz, 711MHz or 800MHz transfer rates while using conventional system and
board design technologies.
Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).
The architecture of the Direct RDRAM enables the highest sustained bandwidth for multiple, simultaneous,
randomly addressed memory transactions. The separate control and data buses with independent row and column
control yield over 95 % bus efficiency. The Direct RDRAM's 32 banks support up to four simultaneous transactions
per device.
Features
184 edge connector pads with 1mm pad spacing
128 MB Direct RDRAM storage
Each RDRAM
has 32 banks, for 128 banks total on module
Gold plated contacts
RDRAMs use Chip Scale Package (CSP)
Serial Presence Detect support
Operates from a 2.5 V supply
Powerdown self refresh modes
Separate Row and Column buses for higher efficiency
Over Drive Factor (ODF) support
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local Elpida Memory, Inc. for
availability and additional information.
Document No. E0078N10 (1st edition)
(Previous No. M15040EJ3V0DS00)
Date Published January 2001 CP (K)
Printed in Japan
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
MC-4R128FKE8D
Order information
Part number
Organization
I/O Freq.
MHz
MC-4R128FKE8D - 845
MC-4R128FKE8D - 745
MC-4R128FKE8D - 653
64M x 18
800
711
600
RAS access time
ns
45
45
53
184 edge connector pads RIMM 4 pieces of
with heat spreader
Edge connector : Gold plated
Package
Mounted devices
µ
PD488588FF
FBGA (
µ
BGA
) package
2
Data Sheet
E0078N10
MC-4R128FKE8D
Module Pad Configuration
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
GND
LDQA7
GND
LDQA5
GND
LDQA3
GND
LDQA1
GND
LCFM
GND
LCFMN
GND
NC
GND
LROW2
GND
LROW0
GND
LCOL3
GND
LCOL1
GND
LDQB0
GND
LDQB2
GND
LDQB4
GND
LDQB6
GND
LDQB8
GND
LCMD
V
CMOS
SIN
V
CMOS
NC
GND
NC
V
DD
V
DD
NC
NC
NC
NC
GND
LDQA8
GND
LDQA6
GND
LDQA4
GND
LDQA2
GND
LDQA0
GND
LCTMN
GND
LCTM
GND
NC
GND
LROW1
GND
LCOL4
GND
LCOL2
GND
LCOL0
GND
LDQB1
GND
LDQB3
GND
LDQB5
GND
LDQB7
GND
LSCK
V
CMOS
SOUT
V
CMOS
NC
GND
NC
V
DD
V
DD
NC
NC
NC
NC
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
LCFM, LCFMN,
Side B
Side A
RCFM, RCFMN : Clock from master
LCTM, LCTMN,
RCTM, RCTMN : Clock to master
LCMD, RCMD
: Serial Command Pad
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
NC
NC
NC
NC
V
REF
GND
SA0
V
DD
SA1
SV
DD
SA2
V
DD
RCMD
GND
RDQB8
GND
RDQB6
GND
RDQB4
GND
RDQB2
GND
RDQB0
GND
RCOL1
GND
RCOL3
GND
RROW0
GND
RROW2
GND
NC
GND
RCFMN
GND
RCFM
GND
RDQA1
GND
RDQA3
GND
RDQA5
GND
RDQA7
GND
NC
NC
NC
NC
V
REF
GND
SCL
V
DD
SDA
SV
DD
SWP
V
DD
RSCK
GND
RDQB7
GND
RDQB5
GND
RDQB3
GND
RDQB1
GND
RCOL0
GND
RCOL2
GND
RCOL4
GND
RROW1
GND
NC
GND
RCTM
GND
RCTMN
GND
RDQA0
GND
RDQA2
GND
RDQA4
GND
RDQA6
GND
RDQA8
GND
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
LROW2 - LROW0,
RROW2 - RROW0 : Row bus
LCOL4 - LCOL0,
RCOL4 - RCOL0
LDQA8 - LDQA0,
RDQA8 - RDQA0
LDQB8 - LDQB0,
RDQB8 - RDQB0
SA0 - SA2
SCL, SDA
SIN, SOUT
SV
DD
SWP
V
CMOS
V
DD
V
REF
GND
NC
: Data bus B
LSCK, RSCK : Clock input
: Serial Presence Detect Address
: Serial Presence Detect Clock
: Serial I/O
: SPD Voltage
: Serial Presence Detect Write Protect
: Supply voltage for serial pads
: Supply voltage
: Logic threshold
: Ground reference
: These pads are not connected
: Data bus A
: Column bus
Data Sheet
E0078N10
3
MC-4R128FKE8D
Module Pad Names
Pad
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
Signal Name
GND
LDQA8
GND
LDQA6
GND
LDQA4
GND
LDQA2
GND
LDQA0
GND
LCTMN
GND
LCTM
GND
NC
GND
LROW1
GND
LCOL4
GND
LCOL2
GND
LCOL0
GND
LDQB1
GND
LDQB3
GND
LDQB5
GND
LDQB7
GND
LSCK
V
CMOS
SOUT
V
CMOS
NC
GND
NC
V
DD
V
DD
NC
NC
NC
NC
Pad
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
Signal Name
GND
LDQA7
GND
LDQA5
GND
LDQA3
GND
LDQA1
GND
LCFM
GND
LCFMN
GND
NC
GND
LROW2
GND
LROW0
GND
LCOL3
GND
LCOL1
GND
LDQB0
GND
LDQB2
GND
LDQB4
GND
LDQB6
GND
LDQB8
GND
LCMD
V
CMOS
SIN
V
CMOS
NC
GND
NC
V
DD
V
DD
NC
NC
NC
NC
Pad
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
Signal Name
NC
NC
NC
NC
V
REF
GND
SCL
V
DD
SDA
SV
DD
SWP
V
DD
RSCK
GND
RDQB7
GND
RDQB5
GND
RDQB3
GND
RDQB1
GND
RCOL0
GND
RCOL2
GND
RCOL4
GND
RROW1
GND
NC
GND
RCTM
GND
RCTMN
GND
RDQA0
GND
RDQA2
GND
RDQA4
GND
RDQA6
GND
RDQA8
GND
Pad
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
Signal Name
NC
NC
NC
NC
V
REF
GND
SA0
V
DD
SA1
SV
DD
SA2
V
DD
RCMD
GND
RDQB8
GND
RDQB6
GND
RDQB4
GND
RDQB2
GND
RDQB0
GND
RCOL1
GND
RCOL3
GND
RROW0
GND
RROW2
GND
NC
GND
RCFMN
GND
RCFM
GND
RDQA1
GND
RDQA3
GND
RDQA5
GND
RDQA7
GND
4
Data Sheet
E0078N10
MC-4R128FKE8D
Module Connector Pad Description
Signal
GND
LCFM
I/O
I
Type
RSL
Description
Ground reference for RDRAM core and interface. 72 PCB connector pads.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Positive polarity.
LCFMN
I
RSL
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Negative polarity.
LCMD
I
V
CMOS
Serial Command used to read from and write to the control registers. Also used
for power management.
LCOL4..LCOL0
I
RSL
Column bus. 5-bit bus containing control and address information for column
accesses.
LCTM
I
RSL
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
LCTMN
I
RSL
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
LDQA8..LDQA0
I/O
RSL
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. LDQA8 is non-functional on modules with x16 RDRAM devices.
LDQB8..LDQB0
I/O
RSL
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. LDQB8 is non-functional on modules with x16 RDRAM devices.
LROW2..LROW0
LSCK
I
I
RSL
V
CMOS
Row bus. 3-bit bus containing control and address information for row accesses.
Serial clock input. Clock source used to read from and write to the RDRAM
control registers.
NC
These pads are not connected. These 24 connector pads are reserved for future
use.
RCFM
RCFMN
RCMD
RCOL4..RCOL0
RCTM
RCTMN
RDQA8..RDQA0
RDQB8..RDQB0
RROW2..RROW0
I
I
I
I
I
I
I/O
I/O
I
RSL
RSL
V
CMOS
RSL
RSL
RSL
RSL
RSL
RSL
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Positive polarity.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Negative polarity.
Serial Command Input used to read from and write to the control registers. Also
used for power management.
Column bus. 5-bit bus containing control and address information for column
accesses.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. RDQA8 is non-functional on modules with x16 RDRAM devices.
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. RDQB8 is non-functional on modules with x16 RDRAM devices.
Row bus. 3-bit bus containing control and address information for row accesses.
(1/2)
Data Sheet
E0078N10
5

MC-4R128FKE8D-653 Related Products

MC-4R128FKE8D-653 MC-4R128FKE8D-845 MC-4R128FKE8D-745
Description Rambus DRAM Module, 64MX18, MOS, RIMM-184 Rambus DRAM Module, 64MX18, MOS, RIMM-184 Rambus DRAM Module, 64MX18, MOS, RIMM-184
Maker NEC Electronics NEC Electronics NEC Electronics
Reach Compliance Code unknown unknown unknown
access mode BLOCK ORIENTED PROTOCOL BLOCK ORIENTED PROTOCOL BLOCK ORIENTED PROTOCOL
Other features SELF CONTAINED REFRESH SELF CONTAINED REFRESH SELF CONTAINED REFRESH
JESD-30 code R-XDMA-N184 R-XDMA-N184 R-XDMA-N184
memory density 1207959552 bit 1207959552 bit 1207959552 bit
Memory IC Type RAMBUS DRAM MODULE RAMBUS DRAM MODULE RAMBUS DRAM MODULE
memory width 18 18 18
Number of functions 1 1 1
Number of ports 1 1 1
Number of terminals 184 184 184
word count 67108864 words 67108864 words 67108864 words
character code 64000000 64000000 64000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
organize 64MX18 64MX18 64MX18
Package body material UNSPECIFIED UNSPECIFIED UNSPECIFIED
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
Certification status Not Qualified Not Qualified Not Qualified
self refresh YES YES YES
Maximum supply voltage (Vsup) 2.63 V 2.63 V 2.63 V
Minimum supply voltage (Vsup) 2.37 V 2.37 V 2.37 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V 2.5 V
surface mount NO NO NO
technology MOS MOS MOS
Terminal form NO LEAD NO LEAD NO LEAD
Terminal location DUAL DUAL DUAL

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