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Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> MC9S12H256VFV
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MC9S12H256VFV

Description
Microcontroller, 16-Bit, FLASH, CPU12 CPU, 25MHz, CMOS, PQFP144, LQFP-144
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size965KB，124 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
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MC9S12H256VFV Overview

Microcontroller, 16-Bit, FLASH, CPU12 CPU, 25MHz, CMOS, PQFP144, LQFP-144

MC9S12H256VFV Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMotorola ( NXP )
package instructionLFQFP, QFP144,.87SQ,20
Reach Compliance Codeunknown
Has ADCYES
Other featuresALSO REQUIRES 5V SUPPLY
Address bus width16
bit size16
CPU seriesCPU12
maximum clock frequency16 MHz
DAC channelNO
DMA channelNO
External data bus width16
JESD-30 codeS-PQFP-G144
length20 mm
Number of I/O lines117
Number of terminals144
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Encapsulate equivalent codeQFP144,.87SQ,20
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2.5,5 V
Certification statusNot Qualified
RAM (bytes)12288
rom(word)262144
ROM programmabilityFLASH
Maximum seat height1.6 mm
speed25 MHz
Maximum supply voltage2.75 V
Minimum supply voltage2.35 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width20 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER

MC9S12H256VFV Preview

Freescale Semiconductor, Inc.
DOCUMENT NUMBER
9S12H256BDGV1/D
MC9S12H256
Device User Guide
V01.16
Freescale Semiconductor, Inc...
Original Release Date: 29 SEP 2000
Revised: 05 NOV 2003
Motorola, Inc
Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or
design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein;
neither does it convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized
application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was
negligent regarding the design or manufacture of the part.
1
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
DOCUMENT NUMBER
9S12H256BDGV1/D
Revision History
Version Revision Effective
Number
Date
Date
V01.00
V01.01
07 MAR
2001
10 MAI
2001
14 MAY
2001
30 MAY
2001
11 JUN
2001
18 JUN
2001
03 APR
2001
10 MAY
2001
14 MAY
2001
30 MAY
2001
11 JUN
2001
18 JUN
2001
Author
Initial version.
Description of Changes
Freescale Semiconductor, Inc...
- Minor formal corrections
- Changed ATD coupling ratio to10
-2
- Changed V
DD5
to 4.5V
- Removed 112-pin package references
- Changed ATD Electrical Characteristics separate coupling ratio for
positive and negative bulk current injection
- Reinserted 112-pin package information.
- Removed SRSv2 comment from preface
- Corrected RESET pin to active low in table 2-1
- Adapted style and wording to 9DP256 device user guide
- Minor format and wording improvements
- Added SRAM data retention disclaimer
- Changed Oscillator Characteristics t
CQOUT
max 2.5s and replaced
Clock Monitor Time-out by Clock Monitor Failure Assert Frequency
- Changed Self Clock Mode Frequency min 1MHz and max 5.5MHz
- Changed I
DDPS
(RTI and COP disabled) to 400
µ
A
- Corrected typo in Figure 2-1 pin 76: PK3 -> PK2
- Added t
EXTR
and t
EXTF
to Oscillator Characteristics
- Added typ value for t
UPOSC
- Corrected t
EXTL
and t
EXTH
values
- Updated thermal resistances as per Thermal Simulation Report,
July 10, 2001
- updated EEPROM size
- added DC cutoff capacitor into layout proposals
- minor updates
- updated electrical spec
V01.02
V01.03
V01.04
V01.05
V01.06
28 JUN
2001
28 JUN
2001
V01.07
12 JUL
2001
16 JUL
2001
03 AUG
2001
29 AUG
2001
12 JUL
2001
16 JUL
2001
03 AUG
2001
29 AUG
2001
V01.08
V01.09
V01.10
Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or
design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein;
neither does it convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized
application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was
negligent regarding the design or manufacture of the part.
2
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
MC9S12H256 Device User Guide — V01.16
Version Revision Effective
Number
Date
Date
V01.11
V01.12
11 OCT
2001
07 NOV
2001
11 OCT
2001
07 NOV
2001
Author
Description of Changes
- Replaced references w.r.t. new family name HCS12.
- Corrected XCLKS reference in CRG electrical spec.
- added ‘powered by’ column in pin list table
- new document numbering
- removed document order number except from cover sheet
- updated min VDD, VDDPLL
- updated currents on V
OH
,V
OL
for standard pins
- updated C
IN
, I
DDS
, I
REF
, C
INS
, T
EXTL
, T
EXTH
- included missing lcd electrical spec
- updated NVM spec
- updated input leakage
- updated slew rate spec on PU,PV, PW
- updated supply currents
- included 1K78X
- added detailed register map
- added K
1
max value
- added chragepump current min/max values
- corrected pinout problem in LQFP112 layout proposal
V01.13
08 MAR
2002
08 MAR
2002
Freescale Semiconductor, Inc...
V01.14
16 DEC
2002
31 MAR
2003
05 NOV
2003
16 DEC
2002
31 MAR
2003
05 NOV
2003
V01.15
V01.16
3
For More Information On This Product,
Go to: www.freescale.com
MC9S12H256 Device User Guide — V01.16
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
4
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
MC9S12H256 Device User Guide — V01.16
Section 1 Introduction
1.1
1.2
1.3
1.4
1.5
1.5.1
1.6
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Detailed Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Part ID Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Section 2 Signal Description
2.1
Device Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
2.2
Signal Properties Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
2.3
Detailed Signal Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
2.3.1
EXTAL, XTAL — Oscillator Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
2.3.2
RESET — External Reset Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
2.3.3
TEST — Test Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.3.4
XFC — PLL Loop Filter Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.3.5
BKGD / TAGHI / MODC — Background Debug, Tag High, and Mode Pin. . . . . . . . . . . . . 54
2.3.6
PAD[15:8] / AN[15:8] — Port AD Input Pins [15:8] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.3.7
PAD[7:0] / AN[7:0] — Port AD Input Pins [7:0] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.3.8
PA[7:0] / FP[15:8] / ADDR[15:8] / DATA[15:8] — Port A I/O Pins . . . . . . . . . . . . . . . . . . 54
2.3.9
PB[7:0] / FP[7:0] / ADDR[7:0] / DATA[7:0] — Port B I/O Pins . . . . . . . . . . . . . . . . . . . . . . 54
2.3.10
PE7 / FP22 / XCLKS / NOACC — Port E I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.3.11
PE6 / MODB / IPIPE1 — Port E I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.3.12
PE5 / MODA / IPIPE0 — Port E I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.3.13
PE4 / ECLK — Port E I/O Pin 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.3.14
PE3 / FP21 / LSTRB / TAGLO — Port E I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.3.15
PE2 / FP20 / R/W — Port E I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.3.16
PE1 / IRQ — Port E Input Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.3.17
PE0 / XIRQ — Port E Input Pin 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.3.18
PH[7:0] / KWH[7:0] — Port H I/O Pins [7:0]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.3.19
PJ[3:0] / KWJ[3:0] — Port J I/O Pins [3:0]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.3.20
PK7 / FP23 / ECS / ROMONE — Port K I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.3.21
PK[3:0] / BP[3:0] / XADDR[17:14] — Port K I/O Pins [3:0] . . . . . . . . . . . . . . . . . . . . . . . . 56
2.3.22
PL[7:4] / FP[31:28] — Port L I/O Pins [7:4]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2.3.23
PL[3:0] / FP[19:16] — Port L I/O Pins [3:0]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Freescale Semiconductor, Inc...
5
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