935284953557 datasheet, PDF - EEWORLD Datasheet

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935284953557: DescriptionLVC/LCX/Z SERIES, QUAD 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT536-1, LFBGA-96; Categorylogic logic; File Size107KB，14 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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935284953557 Overview

LVC/LCX/Z SERIES, QUAD 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT536-1, LFBGA-96

935284953557 Parametric

Parameter Name	Attribute value
package instruction	LFBGA,
Reach Compliance Code	unknow
series	LVC/LCX/Z
JESD-30 code	R-PBGA-B96
JESD-609 code	e0
length	13.5 mm
Logic integrated circuit type	BUS TRANSCEIVER
Number of digits	8
Number of functions	4
Number of ports	2
Number of terminals	96
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
propagation delay (tpd)	4.7 ns
Maximum seat height	1.5 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.2 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	5.5 mm
Base Number Matches	1

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74LVC32245A

32-bit bus transceiver with direction pin; 5 V tolerant; 3-state

Rev. 2 — 8 November 2011

Product data sheet

1. General description

The 74LVC32245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible

outputs in both send and receive directions. The device features four output enable (nOE)

inputs for easy cascading and four send/receive (nDIR) inputs for direction control.

Pin nOE controls the outputs so that the buses are effectively isolated.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices in mixed

3.3 V and 5 V applications.

To ensure the high-impedance state during power-up or power-down, pin nOE should be

tied to V

through a pull-up resistor; the minimum value of the resistor is determined by

the current-sinking capability of the driver.

2. Features and benefits



5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 2.3 V to 3.6 V

CMOS low power consumption

MULTIBYTE flow-through standard pin-out architecture

Low inductance multiple power and ground pins for minimum noise and ground

bounce

Direct interface with TTL levels

Inputs accept voltages up to 5.5 V

High-impedance when V

= 0 V

Complies with JEDEC standard:



JESD8-7A (1.65 V to 1.95 V)



JESD8-5A (2.3 V to 2.7 V)



JESD8-C/JESD36 (2.7 V to 3.6 V)

ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115B exceeds 200 V



CDM JESD22-C101E exceeds 1000 V

Specified from

40 C

to +85

C

and

40 C

to +125

C

Packaged in plastic fine-pitch ball grid array package



935284953557 Related Products

	935284953557	935284953518	935284953551
Description	LVC/LCX/Z SERIES, QUAD 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT536-1, LFBGA-96	LVC/LCX/Z SERIES, QUAD 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT536-1, LFBGA-96	LVC/LCX/Z SERIES, QUAD 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT536-1, LFBGA-96
package instruction	LFBGA,	LFBGA,	LFBGA,
Reach Compliance Code	unknow	unknow	unknow
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PBGA-B96	R-PBGA-B96	R-PBGA-B96
JESD-609 code	e0	e0	e0
length	13.5 mm	13.5 mm	13.5 mm
Logic integrated circuit type	BUS TRANSCEIVER	BUS TRANSCEIVER	BUS TRANSCEIVER
Number of digits	8	8	8
Number of functions	4	4	4
Number of ports	2	2	2
Number of terminals	96	96	96
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFBGA	LFBGA	LFBGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH
propagation delay (tpd)	4.7 ns	4.7 ns	4.7 ns
Maximum seat height	1.5 mm	1.5 mm	1.5 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	1.2 V	1.2 V	1.2 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM
width	5.5 mm	5.5 mm	5.5 mm
Base Number Matches	1	1	1

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