IS64C1024L
128K x 8 HIGH-SPEED
CMOS STATIC RAM
FEATURES
• High-speed access time: 15 ns
•
Low active and standby power
• Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 5V (±10%) power supply
• Temperature offerings:
Option A1: -40
o
C to +85
o
C
Option A2: -40
o
C to +105
o
C
Option A3: -40
o
C to +125
o
C
ISSI
DESCRIPTION
®
ADVANCED INFORMATION
JANUARY 2003
The
ISSI
IS64C1024L is a very high-speed, low power,
131,072-word by 8-bit CMOS static RAMs. It is fabricated
using
ISSI's
high-performance CMOS technology. This
highly reliable process coupled with innovative circuit
design techniques, yields higher performance and low
power consumption devices.
When
CE1
is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation
can be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip
Enable inputs,
CE1
and CE2. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS64C1024L is available in the following 32-pin
packages: 300-mil and 400-mil SOJ, and TSOP (Type I,
8x20).
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
512 x 2048
MEMORY ARRAY
V
DD
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
1024 BLK.eps
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Advanced Information Rev. 00A
01/22/03
1
IS64C1024L
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
Value
–0.5 to +7.0
–65 to +150
1.5
Unit
V
°C
W
ISSI
®
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions above those indicated in the opera-
tional sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect reliability.
OPERATING RANGE
Options
A1
A2
A3
Ambient Temperature
–40°C to +85°C
–40°C to +105°C
–40°C to +125°C
IS64C1024L
4.5V - 5.5V
4.5V - 5.5V
4.5V - 5.5V
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
V
OH
V
OL
V
IH
V
IL
I
LI
I
LO
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
GND
≤
V
IN
≤
V
DD
GND
≤
V
OUT
≤
V
DD
Outputs Disabled
Test Conditions
V
DD
= Min., I
OH
= –4.0 mA
V
DD
= Min., I
OL
= 8.0 mA
Min.
2.4
—
2.2
–0.3
—
–5
—
–5
Max.
—
0.4
V
DD
+ 0.5
0.8
—
5
—
5
Unit
V
V
V
V
µA
µA
Note:
1. V
IL
= –3.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Advanced Information Rev. 00A
01/22/03
3
IS64C1024L
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
I
CC
1
Parameter
V
DD
Operating
Supply Current
V
DD
Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
DD
= V
DD MAX
.,
CE
= V
IL
I
OUT
= 0 mA, f = 0
V
DD
= V
DD MAX
.,
CE
= V
IL
I
OUT
= 0 mA, f = f
MAX
V
DD
= V
DD MAX
,
V
IN
= V
IH
or V
IL
CE1
≥
V
IH
, f = 0 or
CE2
≤
V
IL
, f = 0
V
DD
= V
DD MAX
.,
CE1
≤
V
DD
– 0.2V,
CE2
≤
0.2V
V
IN
≥
V
DD
– 0.2V, or
V
IN
≤
0.2V, f = 0
Options
A1
A2
A3
A1
A2
A3
A1
A2
A3
A1
A2
A3
-15 ns
Min. Max.
—
—
—
—
—
—
—
—
—
—
—
—
90
95
100
150
155
160
30
40
45
1.0
2
3
Unit
mA
ISSI
®
I
CC
2
mA
I
SB
1
mA
I
SB
2
CMOS Standby
Current (CMOS Inputs)
mA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE
(1,2)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
5
7
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz, V
DD
= 5.0V.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Advanced Information Rev. 00A
01/22/03
IS64C1024L
ISSI
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
®
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
AC TEST LOADS
480
Ω
5V
5V
480
Ω
OUTPUT
30 pF
Including
jig and
scope
255
Ω
OUTPUT
5 pF
Including
jig and
scope
255
Ω
Figure 1
Figure 2
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-15 ns
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE1
Access Time
CE2 Access Time
OE
Access Time
OE
to Low-Z Output
OE
to High-Z Output
CE1
to Low-Z Output
CE2 to Low-Z Output
CE1
or CE2 to High-Z Output
CE1
or CE2 to Power-Up
CE1
or CE2 to Power-Down
Min.
15
—
2
—
—
—
0
0
2
2
0
0
—
Max.
—
15
—
15
15
7
—
6
—
—
8
—
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACE
1
t
ACE
2
t
DOE
t
LZOE
(3)
t
HZOE
(3)
t
LZCE
1
(3)
t
LZCE
2
(3)
t
HZCE
(3)
t
PU
(4)
t
PD
(4)
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Advanced Information Rev. 00A
01/22/03
5
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