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HY62QF16803ASLM-I-85

Description
Standard SRAM, 512KX16, 85ns, CMOS, PBGA48, MICRO, BGA-48
Categorystorage    storage   
File Size143KB,8 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
Download Datasheet Parametric View All

HY62QF16803ASLM-I-85 Overview

Standard SRAM, 512KX16, 85ns, CMOS, PBGA48, MICRO, BGA-48

HY62QF16803ASLM-I-85 Parametric

Parameter NameAttribute value
MakerSK Hynix
Parts packaging codeBGA
package instructionVFBGA,
Contacts48
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time85 ns
JESD-30 codeR-PBGA-B48
JESD-609 codee1
length8.5 mm
memory density8388608 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals48
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize512KX16
Package body materialPLASTIC/EPOXY
encapsulated codeVFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height0.95 mm
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN SILVER COPPER
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
width7.4 mm
HY62QF16803A Series
512Kx16bit full CMOS SRAM
Preliminary
DESCRIPTION
The HY62QF16803A is a high speed, super low
power and 8Mbit full CMOS SRAM organized as
524,288 words by 16bits. The HY62QF16803A
uses high performance full CMOS process
technology and is designed for high speed and
low power circuit technology. It is particularly well-
suited for the high density low power system
application. This device has a data retention
mode that guarantees data to remain valid at a
minimum power supply voltage of 1.2V.
Product
Voltage
Speed
No.
(V)
(ns)
HY62QF16803A
2.3~2.7 70/85/100
HY62QF16803A- I
2.3~2.7 70/85/100
Note 1. Blank : Commercial, I : Industrial
2. Current value is max.
FEATURES
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Battery backup(LL/SL-part)
- 1.2V(min) data retention
Standard pin configuration
- 48-uBGA
Operation
Current/Icc(mA)
3
3
Standby Current(uA)
LL
SL
30
8
30
8
Temperature
(°C)
0~70
-45~85(I)
PIN CONNECTION
( Top View )
A1,A2
A4,A6~A7
A9
A12
A15~A18
A8
BLOCK DIAGRAM
ADD INPUT
BUFFER
ROW
DECODER
SENSE AMP
I/O1
/LB
/OE A0
A1
A4
A6
A2
NC
COLUMN
DECODER
IO9 /UB A3
IO10 IO11 A5
/CS IO1
IO2 IO3
IO4 Vcc
I/O8
DATA I/O
BUFFER
ADD INPUT
BUFFER
PRE DECODER
A10
A13
A14
A0
A3
A5
Vss IO12 A17 A7
MEMORY ARRAY
512K x 16
WRITE DRIVER
I/O9
BLOCK
DECODER
Vcc IO13 Vss A16 IO5 Vss
IO15 IO14 A14 A15 IO6 IO7
IO16 NC
A18 A8
A12 A13 /WE IO8
A9
A10 A11 NC
ADD INPUT
BUFFER
I/O16
A11
/CS
/OE
/LB
/UB
/WE
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
/LB
/UB
Pin Function
Chip Select
Write Enable
Output Enable
Lower Byte Control(I/O1~I/O8)
Upper Byte Control(I/O9~I/O16)
Pin Name
I/O1~I/O16
A0~A18
Vcc
Vss
NC
Pin Function
Data Inputs / Outputs
Address Inputs
Power(2.3V~2.7V)
Ground
No Connection
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.03 /Jun. 2000
Hyundai Semiconductor
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