SN74LS257B SN74LS258B
Quad 2-Input Multiplexer
with 3-State Outputs
The LSTTL / MSI SN74LS257B and the SN74LS258B are Quad
2-Input Multiplexers with 3-state outputs. Four bits of data from two
sources can be selected using a Common Data Select input. The four
outputs present the selected data in true (non-inverted) form. The
outputs may be switched to a high impedance state with a HIGH on the
common Output Enable (E
O
) Input, allowing the outputs to interface
directly with bus oriented systems. It is fabricated with the Schottky
barrier diode process for high speed and is completely compatible with
all ON Semiconductor TTL families.
http://onsemi.com
LOW
POWER
SCHOTTKY
•
•
•
•
•
•
Schottky Process For High Speed
Multiplexer Expansion By Tying Outputs Together
Non-Inverting 3-State Outputs
Input Clamp Diodes Limit High Speed Termination Effects
Special Circuitry Ensures Glitch Free Multiplexing
ESD > 3500 Volts
16
1
GUARANTEED OPERATING RANGES
Symbol
V
CC
T
A
I
OH
I
OL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Current – High
Output Current – Low
Min
4.75
0
Typ
5.0
25
Max
5.25
70
– 2.6
24
Unit
V
°C
mA
mA
16
PLASTIC
N SUFFIX
CASE 648
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device
SN74LS257BN
SN74LS257BD
SN74LS258BN
SN74LS258BD
Package
16 Pin DIP
16 Pin
16 Pin DIP
16 Pin
Shipping
2000 Units/Box
2500/Tape & Reel
2000 Units/Box
2500/Tape & Reel
©
Semiconductor Components Industries, LLC, 1999
1
December, 1999 – Rev. 6
Publication Order Number:
SN74LS257B/D
SN74LS257B SN74LS258B
CONNECTION DIAGRAM DIP
(TOP VIEW)
V
CC
16
E
0
15
I
0c
14
I
1c
13
Z
c
12
I
0d
11
I
1d
10
Z
d
9
SN74LS257B
V
CC
= PIN 16
GND = PIN 8
1
S
V
CC
16
2
I
0a
E
0
15
3
I
1a
I
0c
14
4
Z
a
I
1c
13
5
I
0b
Z
c
12
6
I
1b
I
0d
11
7
Z
b
I
1d
10
8
GND
Z
d
9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
SN74LS258B
1
S
2
I
0a
3
I
1a
4
Z
a
5
I
0b
6
I
1b
7
Z
b
8
GND
http://onsemi.com
2
SN74LS257B SN74LS258B
LOGIC DIAGRAMS
SN74LS257B
E
0
15
I
0a
2
I
1a
3
I
0b
5
I
1b
6
I
0c
14
I
1c
13
I
0d
11
I
1d
10
S
1
4
7
12
9
Z
a
Z
b
Z
c
Z
d
SN74LS258B
E
0
15
I
0a
2
I
1a
3
I
0b
5
I
1b
6
I
0c
14
I
1c
13
I
0d
11
I
1d
10
S
1
V
CC
= PIN 16
GND = PIN 8
= PIN NUMBERS
4
7
12
9
Z
a
Z
b
Z
c
Z
d
http://onsemi.com
3
SN74LS257B SN74LS258B
FUNCTIONAL DESCRIPTION
The LS257B and LS258B are Quad 2-Input Multiplexers
with 3-state outputs. They select four bits of data from two
sources each under control of a Common Data Select Input.
When the Select Input is LOW, the I
0
inputs are selected and
when Select is HIGH, the I
1
inputs are selected. The data on
the selected inputs appears at the outputs in true
(non-inverted) form for the LS257B and in the inverted form
for the LS258B.
The LS257B and LS258B are the logic implementation of
a 4-pole, 2-position switch where the position of the switch
is determined by the logic levels supplied to the Select Input.
The logic equations for the outputs are shown below:
LS257B
Z
a
= E
0
•
(I
1a
•
S + I
0a
•
S) Z
b
= E
0
•
(I
1b
•
S + I
0b
•
S)
Z
c
= E
0
•
(I
1c
•
S + I
0c
•
S) Z
d
= E
0
•
(I
1d
•
S + I
0d
•
S)
When the Output Enable Input (E
0
) is HIGH, the outputs
are forced to a high impedance “off” state. If the outputs are
tied together, all but one device must be in the high
impedance state to avoid high currents that would exceed the
maximum ratings. Designers should ensure that Output
Enable signals to 3-state devices whose outputs are tied
together are designed so there is no overlap.
LS258B
Z
a
= E
0
•
(I
1a
•
S + I
0a
•
S) Z
b
= E
0
•
(I
1b
•
S + I
0b
•
S)
Z
c
= E
0
•
(I
1c
•
S + I
0c
•
S) Z
d
= E
0
•
(I
1d
•
S + I
0d
•
S)
TRUTH TABLE
OUTPUT
ENABLE
E
O
H
L
L
L
L
SELECT
INPUT
S
X
H
H
L
L
DATA
INPUTS
I
0
X
X
X
L
H
I
1
X
L
H
X
X
OUTPUTS
LS257B
Z
(Z)
L
H
L
H
OUTPUTS
LS258B
Z
(Z)
H
L
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
(Z) = High Impedance (off)
http://onsemi.com
4
SN74LS257B SN74LS258B
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
V
IH
V
IL
V
IK
V
OH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
2.4
– 0.65
3.1
0.25
V
O
OL
I
OZH
I
OZL
Output LOW Voltage
0.35
Output Off Current — HIGH
Output Off Current — LOW
Input HIGH Current
Other Inputs
S Inputs
Other Inputs
S Inputs
I
IL
I
OS
Input LOW Current
All Inputs
Short Circuit Current (Note 1)
Power Supply Current
Total, Output HIGH
I
CC
Total, Output LOW
Total, Output 3-State
LS257B
LS258B
LS257B
LS258B
LS257B
LS258B
10
9.0
16
14
19
16
mA
V
CC
= MAX
– 30
0.5
20
– 20
20
40
0.1
0.2
– 0.4
– 130
V
µA
µA
µA
I
OL
= 24 mA
0.4
Min
2.0
0.8
– 1.5
Typ
Max
Unit
V
V
V
V
V
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
V
CC
= MIN, I
IN
= – 18 mA
V
CC
= MIN, I
OH
= MAX, V
IN
= V
IH
or V
IL
per Truth Table
I
OL
= 12 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
per Truth Table
V
CC
= MAX, V
OUT
= 2.7 V
V
CC
= MAX, V
OUT
= 0.4 V
V
CC
= MAX, V
IN
= 2.7 V
I
IH
mA
mA
mA
V
CC
= MAX, V
IN
= 7.0 V
V
CC
= MAX, V
IN
= 0.4 V
V
CC
= MAX
mA
mA
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(T
A
= 25°C, V
CC
= 5.0 V) See SN74LS251 for Waveforms
Limits
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PLZ
t
PHZ
Parameter
Propagation Delay, Data to Output
Propagation Delay, Select to Output
Output Enable Time to HIGH Level
Output Enable Time to LOW Level
Output Disable Time to LOW Level
Output Disable Time from HIGH Level
Min
Typ
10
12
14
14
20
20
16
18
Max
13
15
21
21
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
Test Conditions
Figures 1 & 2
C
L
= 45 pF
Figures 1 & 2
Figures 4 & 5
Figures 3 & 5
Figures 3 & 5
Figures 4 & 5
C
L
= 45 pF
R
L
= 667
Ω
C
L
= 5.0 pF
R
L
= 667
Ω
http://onsemi.com
5
京公网安备 11010802033920号
EEWORLD
