DPS128X32CV3-45M datasheet, PDF

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DPS128X32CV3-45M: DescriptionSRAM Module, 512KX8, 45ns, CMOS, CPGA66, 1.090 X 1.090 INCH, 0.252 INCH HEIGHT, VERSA STACK, CERAMIC, PGA-66; Categorystorage storage; File Size635KB，7 Pages; ManufacturerB&B Electronics Manufacturing Company

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DPS128X32CV3-45M Overview

SRAM Module, 512KX8, 45ns, CMOS, CPGA66, 1.090 X 1.090 INCH, 0.252 INCH HEIGHT, VERSA STACK, CERAMIC, PGA-66

DPS128X32CV3-45M Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	B&B Electronics Manufacturing Company
Parts packaging code	PGA
package instruction	1.090 X 1.090 INCH, 0.252 INCH HEIGHT, VERSA STACK, CERAMIC, PGA-66
Contacts	66
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	45 ns
Other features	USER CONFIGURABLE AS 128K X 32
I/O type	COMMON
JESD-30 code	S-CPGA-P66
JESD-609 code	e0
memory density	4194304 bit
Memory IC Type	SRAM MODULE
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	66
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	512KX8
Output characteristics	3-STATE
Exportable	YES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA66,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum seat height	6.4008 mm
Maximum standby current	0.0072 A
Minimum standby current	2 V
Maximum slew rate	0.64 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR

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4 Megabit High Speed CMOS SRAM

DPS128X32CV3/DPS128X32BV3

DESCRIPTION:

The DPS128X32CV3/DPS128X32BV3 ‘’VERSA-STACK’’ module is

a revolutionary new high speed memory subsystem using Dense-Pac

Microsystems’ ceramic Stackable Leadless Chip Carriers (SLCC)

mounted on a co-fired ceramic substrate. It offers 4 Megabits of

SRAM in a package envelope of 1.090 x 1.090 x 0.252 inches.

The DPS128X32CV3/DPS128X32BV3 contains four individual

128K x 8 SRAMs, packaged in their own hermetically sealed SLCCs

making the module suitable for commercial, industrial and military

applications.

By using SLCCs, the ‘’Versa-Stack’’ family of modules offers a higher

board density of memory than available with conventional

through-hole, surface mount, module, or hybrid techniques.

The DPS128X32BV3 has one active low Chip Enable (CE) and while

the DPS128X32CV3 an active low Chip Enable (CE) and an active

high Select Line (SEL).

By using SLCCs, the ‘’Versa-Stack’’ family of modules offer a

higher board density of memory than available with

conventional through-hole, surface mount or hybrid

techniques.

FEATURES:

•

Organizations Available:

128K x 32, 256K x 16, or 512K x 8

Access Times:

20*, 25, 30, 35, 45ns

Fully Static Operation

- No clock or refresh required

Low Power Dissipation:

8.0mW (typ.) Full Standby

0.8W (typ.) Operating (x8)

Single +5V Power Supply,

±10%

Tolerance

TTL Compatible

Common Data Inputs and Outputs

Low Data Retention Current:

140µA typ. (2.0V)

66-Pin PGA ‘’VERSA-STACK’’

Package

FUNCTIONAL BLOCK DIAGRAM

PIN-OUT DIAGRAM

Commercial only.

PIN NAMES

A0 - A16

I/O0 - I/O31

CE0 - CE3

SEL

WE0 - WE1

N.C.

Address Inputs

Data Input/Output

Low Chip Enables

High Chip Enable

Write Enables

Output Enable

Power (+5V)

Ground

No Connect

NOTE:

SEL applies to the DPS128X32CV3 only, No Connect for the DPS128X32BV3 version.

30A044-24

REV. F

This document contains information on a product that is currently released

to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the

right to change products or specifications herein without prior notice.

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