ICS83021AMIT datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Analog mixed-signal IC> Drivers and interfaces> ICS83021AMIT

ICS83021AMIT: DescriptionPECL to TTL Translator, 1 Func, True Output, PDSO8, 3.80 X 4.80 MM, 1.47 MM HEIGHT, SOIC-8; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size95KB，7 Pages; ManufacturerIDT (Integrated Device Technology)

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ICS83021AMIT Overview

PECL to TTL Translator, 1 Func, True Output, PDSO8, 3.80 X 4.80 MM, 1.47 MM HEIGHT, SOIC-8

ICS83021AMIT Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	SOP, SOP8,.25
Contacts	8
Reach Compliance Code	not_compliant
ECCN code	EAR99
Other features	SUPPLY VOLTAGE 3.3 V ALSO POSSIBLE
maximum delay	2.3 ns
Interface integrated circuit type	PECL TO TTL TRANSLATOR
JESD-30 code	R-PDSO-G8
JESD-609 code	e0
length	4.9 mm
Number of digits	1
Number of functions	1
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output latch or register	NONE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	3.9 mm

ICS83021AMIT Preview

Integrated

Circuit

Systems, Inc.

ICS83021I

-1

3.3V D

IFFERENTIAL

-LVCMOS/LVTTL T

RANSLATOR

EATURES

•

1 LVCMOS / LVTTL output

•

Differential CLK, nCLK input pair

•

CLK, nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

•

Maximum output frequency: 350MHz (typical)

•

Part-to-part skew: 500ps (maximum)

•

Small 8 lead SOIC package saves board space

•

3.3V operating supply

•

-40°C to 85°C ambient operating temperature

•

Pin-to-pin compatible with MC100EPT21

ENERAL

ESCRIPTION

T h e I C S 8 3 021I i s a 1 - t o -1 Differential-to-

LVCMOS/LVTTL Translator and a member of the

HiPerClockS™

HiPerClockS™ family of High Performance

Clock Solutions from ICS. The differential input

is highly flexible and can accept the following

input types: LVPECL, LVDS, LVHSTL, SSTL, and HCSL. The

small 8-lead SOIC footprint makes this device ideal for use in

applications with limited board space.

,&6

LOCK

IAGRAM

CLK

nCLK

SSIGNMENT

CLK

nCLK

GND

ICS83021I

8-Lead SOIC

3.8mm x 4.8mm, x 1.47mm package body

M Package

Top View

83021AMI

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 24, 2003

Integrated

Circuit

Systems, Inc.

ICS83021I

-1

3.3V D

IFFERENTIAL

-LVCMOS/LVTTL T

RANSLATOR

Type

Unused

Input

Power

Output

Power

Pullup

Description

No connect.

Pulldown Non-inver ting differential clock input.

Inver ting differential clock input.

Power supply ground.

Single clock output. LVCMOS / LVTTL interface levels.

Positive supply pin.

ABLE

1. P

ESCRIPTIONS

Number

1, 4, 6

Name

CLK

nCLK

GND

NOTE:

Pullup

and

Pulldown

refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

ABLE

2. P

HARACTERISTICS

Symbol

PULLUP

PULLDOWN

OUT

Parameter

Input Capacitance

Power Dissipation Capacitance

(per output)

Input Pullup Resistor

Input Pulldown Resistor

Output Impedance

Test Conditions

Minimum

Typical

Maximum

= 3.6V

Units

KΩ

Ω

83021AMI

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 24, 2003

Integrated

Circuit

Systems, Inc.

ICS83021I

-1

3.3V D

IFFERENTIAL

-LVCMOS/LVTTL T

RANSLATOR

4.6V

-0.5V to V

+ 0.5 V

-0.5V to V

+ 0.5V

112.7°C/W (0 lfpm)

-65°C to 150°C

NOTE: Stresses beyond those listed under Absolute

Maximum Ratings may cause permanent damage to the

device. These ratings are stress specifications only. Functional

operation of product at these conditions or any conditions be-

yond those listed in the

DC Characteristics

AC Character-

istics

is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect product reliability.

BSOLUTE

AXIMUM

ATINGS

Supply Voltage, V

Inputs, V

Outputs, V

Package Thermal Impedance,

Storage Temperature, T

STG

ABLE

3A. P

OWER

UPPLY

DC C

HARACTERISTICS

= 3.3V±0.3V, T

= -40°C

85°C

Symbol

Parameter

Positive Supply Voltage

Power Supply Current

Test Conditions

Minimum

3.0

Typical

3.3

Maximum

3.6

Units

ABLE

3B. LVCMOS / LVTTL DC C

HARACTERISTICS

= 3.3V±0.3V, T

= -40°C

85°C

Symbol

Parameter

Output High Voltage; NOTE 1

Output Low Voltage; NOTE 1

Test Conditions

Minimum

2.6

0.5

Typical

Maximum

Units

NOTE 1: Outputs terminated with 50

Ω

to V

/2. See Parameter Measurement Information, 3.3V Output Load Test Circuit.

ABLE

3C. D

IFFERENTIAL

DC C

HARACTERISTICS

= 3.3V±0.3V, T

= -40°C

85°C

Symbol

Parameter

Input High Current

Input Low Current

nCLK

CLK

nCLK

CLK

Test Conditions

= V

= 3.6V

= V

= 3.6V

= 0V, V

= 3.6V

= 0V, V

= 3.6V

-150

-5

1.3

- 0.85

Minimum

Typical

Maximum

150

Units

µA

Peak-to-Peak Input Voltage

0.15

Common Mode Input Voltage;

CMR

GND + 0.5

NOTE 1, 2

NOTE 1: For single ended applications

the maximum input voltage for CLK, nCLK is V

+ 0.3V.

NOTE 2: Common mode voltage is defined as V

ABLE

4. AC C

HARACTERISTICS

= 3.3V±0.3V, T

= -40°C

85°C

Symbol Parameter

MAX

Output Frequency

Propagation Delay, NOTE 1

Par t-to-Par t Skew; NOTE 2, 3

Output Rise/Fall Time

Output Duty Cycle

0.8V to 2V

ƒ≤ 166MHz

100

250

ƒ≤ 350MHz

1.7

Test Conditions

Minimum

Typical

350

2.0

2.3

500

400

Maximum

Units

MHz

sk(pp)

/ t

odc

ƒ > 166MHz

All parameters measured at f

MAX

unless noted otherwise.

NOTE 1: Measured from the differential input crossing point to the output at V

/2.

NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages

and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at V

/2.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.

83021AMI

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 24, 2003

Integrated

Circuit

Systems, Inc.

ICS83021I

-1

3.3V D

IFFERENTIAL

-LVCMOS/LVTTL T

RANSLATOR

ARAMETER

EASUREMENT

NFORMATION

1.65V ± 0.15V

SCOPE

nCLK

LVCMOS

CLK

Cross Points

CMR

GND

GND = -1.65V ± 0.15V

3.3V C

ORE

UTPUT

OAD

AC T

EST

IRCUIT

IFFERENTIAL

NPUT

EVEL

PART 1

0.8V

Clock Outputs

0.8V

PART 2

tsk(pp)

ART

-P

ART

KEW

UTPUT

ISE

ALL

IME

nCLK

CLK

Pulse Width

PERIOD

odc =

PERIOD

ROPAGATION

ELAY

83021AMI

odc & t

ERIOD

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 24, 2003

Integrated

Circuit

Systems, Inc.

ICS83021I

-1

3.3V D

IFFERENTIAL

-LVCMOS/LVTTL T

RANSLATOR

PPLICATION

NFORMATION

IRING THE

IFFERENTIAL

NPUT TO

CCEPT

INGLE

NDED

EVELS

Figure 1

shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF = V

/2 is

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio

of R1 and R2 might need to be adjusted to position the V_REF in

the center of the input voltage swing. For example, if the input

clock swing is only 2.5V and V

= 3.3V, V_REF should be 1.25V

and R2/R1 = 0.609.

CLK_IN

V_REF

0.1uF

IGURE

1. S

INGLE

NDED

IGNAL

RIVING

IFFERENTIAL

NPUT

ELIABILITY

NFORMATION

ABLE

. A

LOW

ABLE

by Velocity (Linear Feet per Minute)

Single-Layer PCB, JEDEC Standard Test Boards

Multi-Layer PCB, JEDEC Standard Test Boards

153.3°C/W

112.7°C/W

200

128.5°C/W

103.3°C/W

500

115.5°C/W

97.1°C/W

NOTE:

Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

RANSISTOR

OUNT

The transistor count for ICS83021I is: 416

83021AMI

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 24, 2003

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