MT46HC32M16LFCM-54IT:B datasheet, PDF

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MT46HC32M16LFCM-54IT:B: DescriptionDDR DRAM, 32MX16, 5.4ns, CMOS, PBGA90, 10 X 13 MM, GREEN, PLASTIC, VFBGA-90; Categorystorage storage; File Size3MB，98 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT46HC32M16LFCM-54IT:B Overview

DDR DRAM, 32MX16, 5.4ns, CMOS, PBGA90, 10 X 13 MM, GREEN, PLASTIC, VFBGA-90

MT46HC32M16LFCM-54IT:B Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Micron Technology
Parts packaging code	BGA
package instruction	VFBGA,
Contacts	90
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	5.4 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-PBGA-B90
JESD-609 code	e1
length	13 mm
memory density	536870912 bit
Memory IC Type	DDR DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	90
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	32MX16
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1 mm
self refresh	YES
Maximum supply voltage (Vsup)	1.95 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	10 mm

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512Mb: x16, x32 Mobile LPDDR SDRAM

Features

Mobile Low-Power DDR SDRAM

MT46H32M16LF – 8 Meg x 16 x 4 Banks

MT46H16M32LF – 4 Meg x 32 x 4 Banks

Features

•

DDQ

= 1.70–1.95V

1.2V I/O option V

DDQ

= 1.14–1.30V

Bidirectional data strobe per byte of data (DQS)

Internal, pipelined double data rate (DDR)architec-

ture; two data accesses per clock cycle

Differential clock inputs (CK and CK#)

Commands entered on each positive CK edge

DQS edge-aligned with data for READs;center-

aligned with data for WRITEs

4 internal banks for concurrent operation

Data masks (DM) for masking write data—one mask

per byte

Programmable burst lengths (BL): 2, 4, 8, or 16

Concurrent auto precharge option is supported

Auto refresh and self refresh modes

1.8V LVCMOS-compatible inputs

On-chip temp sensor to control self refresh rate

Partial-array self refresh (PASR)

Deep power-down (DPD)

Status read register (SRR)

Selectable output drive strength (DS)

Clock stop capability

64ms refresh

Table 1: Key Timing Parameters (CL = 3)

Speed Grade

-5

-54

-6

-75

Clock Rate (MHz)

200

185

166

133

Access Time

5.0ns

6.0ns

Options

•

DDQ

–

1.8V/1.8V

–

1.8V/1.2V

•

Configuration

–

32 Meg x 16 (8 Meg x 16 x 4 banks)

–

16 Meg x 32 (4 Meg x 32 x 4 banks)

•

Row-size option

–

JEDEC-standard option

–

Reduced page-size option

•

Plastic green package

–

60-ball VFBGA (8mm x 9mm)

–

90-ball VFBGA (10mm x 13mm)

–

90-ball VFBGA (9mm x 13mm)

•

Timing – cycle time

–

5ns @ CL = 3

–

5.4ns @ CL = 3

–

6ns @ CL = 3

–

7.5ns @ CL = 3

•

Power

–

Standard I

DD2

DD6

–

Low-power I

DD2

DD61

•

Operating temperature range

–

Commercial (0˚ to +70˚C)

–

Industrial (–40˚C to +85˚C)

•

Design revision

Notes:

Marking

32M16

16M32

-5

-54

-6

-75

None

1. Contact factory for availability.

2. Only available for x16 configuration.

3. Only available for x32 configuration.

PDF: 09005aef82d5d305

512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x16, x32 Mobile LPDDR SDRAM

General Description ......................................................................................................................................... 8

Functional Block Diagrams ............................................................................................................................... 9

Ball Assignments and Descriptions ................................................................................................................. 11

Package Dimensions ...................................................................................................................................... 15

Electrical Specifications .................................................................................................................................. 18

Electrical Specifications – I

Parameters ........................................................................................................ 22

Electrical Specifications – AC Operating Conditions ......................................................................................... 26

Output Drive Characteristics ........................................................................................................................... 30

Functional Description ................................................................................................................................... 34

Commands .................................................................................................................................................... 35

DESELECT ................................................................................................................................................ 36

NO OPERATION ........................................................................................................................................ 36

LOAD MODE REGISTER ............................................................................................................................ 36

ACTIVE ..................................................................................................................................................... 36

READ ........................................................................................................................................................ 37

WRITE ...................................................................................................................................................... 38

PRECHARGE ............................................................................................................................................. 39

BURST TERMINATE .................................................................................................................................. 40

AUTO REFRESH ........................................................................................................................................ 40

SELF REFRESH ........................................................................................................................................... 41

DEEP POWER-DOWN ................................................................................................................................ 41

Truth Tables ................................................................................................................................................... 42

State Diagram ................................................................................................................................................ 47

Initialization .................................................................................................................................................. 48

Standard Mode Register .................................................................................................................................. 51

Burst Length .............................................................................................................................................. 51

Burst Type ................................................................................................................................................. 52

CAS Latency .............................................................................................................................................. 53

Operating Mode ......................................................................................................................................... 54

Extended Mode Register ................................................................................................................................. 55

Temperature-Compensated Self Refresh .................................................................................................... 55

Partial-Array Self Refresh ........................................................................................................................... 56

Output Drive Strength ................................................................................................................................ 56

Status Read Register ....................................................................................................................................... 57

Bank/Row Activation ...................................................................................................................................... 59

READ Operation ............................................................................................................................................. 60

WRITE Operation ........................................................................................................................................... 71

PRECHARGE Operation .................................................................................................................................. 83

Auto Precharge ............................................................................................................................................... 83

Concurrent Auto Precharge ........................................................................................................................ 84

AUTO REFRESH Operation ............................................................................................................................. 89

SELF REFRESH Operation .............................................................................................................................. 90

Power-Down .................................................................................................................................................. 91

Deep Power-Down .................................................................................................................................... 93

Clock Change Frequency ................................................................................................................................ 95

Revision History ............................................................................................................................................. 96

Rev. I, Production – 12/09 ........................................................................................................................... 96

Rev. H, Production – 03/09 .......................................................................................................................... 96

Rev. G, Production – 02/09 .......................................................................................................................... 96

Rev. F, Production – 10/08 .......................................................................................................................... 96

Contents

PDF: 09005aef82d5d305

512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x16, x32 Mobile LPDDR SDRAM

Table 1: Key Timing Parameters (CL = 3) .......................................................................................................... 1

Table 2: Configuration Addressing 512 ............................................................................................................. 2

Table 3: VFBGA Ball Descriptions .................................................................................................................. 13

Table 4: Absolute Maximum Ratings .............................................................................................................. 18

Table 5: AC/DC Electrical Characteristics and Operating Conditions ............................................................... 18

Table 6: 1.2V I/O AC/DC Electrical Characteristics and Operating Conditions ................................................. 19

Table 7: Capacitance (x16, x32) ...................................................................................................................... 20

Table 8: I

Specifications and Conditions (x16) ............................................................................................ 22

Table 9: I

Specifications and Conditions (x32) ............................................................................................ 23

Table 10: I

DD6

Specifications and Conditions .................................................................................................. 24

Table 11: Electrical Characteristics and Recommended AC Operating Conditions ............................................ 26

Table 12: Target Output Drive Characteristics (Full Strength) .......................................................................... 30

Table 13: Target Output Drive Characteristics (Three-Quarter Strength) .......................................................... 31

Table 14: 1.2V I/O Target Output Drive Characteristics (Three-Quarter Strength) ............................................ 32

Table 15: Target Output Drive Characteristics (One-Half Strength) ................................................................. 33

Table 16: Truth Table – Commands ............................................................................................................... 35

Table 17: DM Operation Truth Table ............................................................................................................. 36

Table 18: Truth Table – Current State Bank

– Command to Bank

............................................................... 42

Table 19: Truth Table – Current State Bank

– Command to Bank

.............................................................. 43

Table 20: Truth Table – CKE .......................................................................................................................... 46

Table 21: Burst Definition Table .................................................................................................................... 52

List of Tables

PDF: 09005aef82d5d305

512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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