EEWORLDEEWORLDEEWORLD

Part Number

Search

TN0620N3-GP002

Description
Small Signal Field-Effect Transistor,
CategoryDiscrete semiconductor    The transistor   
File Size600KB,5 Pages
ManufacturerSupertex
Download Datasheet Parametric Compare View All

TN0620N3-GP002 Overview

Small Signal Field-Effect Transistor,

TN0620N3-GP002 Parametric

Parameter NameAttribute value
MakerSupertex
package instructionCYLINDRICAL, O-PBCY-T3
Reach Compliance Codeunknown
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage200 V
Maximum drain current (ID)0.25 A
Maximum drain-source on-resistance6 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)35 pF
JEDEC-95 codeTO-92
JESD-30 codeO-PBCY-T3
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
Package shapeROUND
Package formCYLINDRICAL
Polarity/channel typeN-CHANNEL
surface mountNO
Terminal formTHROUGH-HOLE
Terminal locationBOTTOM
transistor applicationsSWITCHING
Transistor component materialsSILICON
Supertex inc.
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
Low threshold - 1.6V max.
High input impedance
Low input capacitance - 110pF typical
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
TN0620
General Description
Applications
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input impedance
and positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary
breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Ordering Information
Part Number
TN0620N3-G
TN0620N3-G P002
TN0620N3-G P003
TN0620N3-G P005
TN0620N3-G P013
TN0620N3-G P014
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Product Summary
Packing
1000/Bag
BV
DSS
/BV
DGS
200V
R
DS(ON)
(max)
Package Option
TO-92
I
D(ON)
(min)
V
GS(th)
(max)
6.0Ω
1.0A
1.6V
TO-92
2000/Reel
Pin Configuration
DRAIN
SOURCE
Absolute Maximum Ratings
Parameter
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
Operating and storage temperature
Value
BV
DSS
BV
DGS
±20V
-55
O
C to +150
O
C
GATE
TO-92
Product Marking
SiTN
06 20
YYWW
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
TO-92
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Typical Thermal Resistance
Package
TO-92
θ
ja
132
O
C/W
Package may or may not include the following marks: Si or
Doc.# DSFP-TN0620
B080813
Supertex inc.
www.supertex.com

TN0620N3-GP002 Related Products

TN0620N3-GP002 TN0620N3-GP013 TN0620N3-GP003 TN0620N3-GP014 TN0620N3-GP005
Description Small Signal Field-Effect Transistor, Small Signal Field-Effect Transistor, Small Signal Field-Effect Transistor, Small Signal Field-Effect Transistor, Small Signal Field-Effect Transistor,
Maker Supertex Supertex Supertex Supertex Supertex
package instruction CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3
Reach Compliance Code unknown unknown unknown unknown unknown
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 200 V 200 V 200 V 200 V 200 V
Maximum drain current (ID) 0.25 A 0.25 A 0.25 A 0.25 A 0.25 A
Maximum drain-source on-resistance 6 Ω 6 Ω 6 Ω 6 Ω 6 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss) 35 pF 35 pF 35 pF 35 pF 35 pF
JEDEC-95 code TO-92 TO-92 TO-92 TO-92 TO-92
JESD-30 code O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3
Number of components 1 1 1 1 1
Number of terminals 3 3 3 3 3
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 150 °C 150 °C 150 °C 150 °C 150 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C -55 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Package shape ROUND ROUND ROUND ROUND ROUND
Package form CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL
Polarity/channel type N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL
surface mount NO NO NO NO NO
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
transistor applications SWITCHING SWITCHING SWITCHING SWITCHING SWITCHING
Transistor component materials SILICON SILICON SILICON SILICON SILICON
MSP430 Program Library Buttons
Keys are one of the most commonly used input devices in single-chip microcomputer systems; almost as long as interactive input is required, a keyboard is necessary. This blog implements a general keyb...
tiankai001 Microcontroller MCU
RSL10-002GEVB Plant Manager Node Design
[i=s]This post was last edited by dql2016 on 2021-7-17 17:18[/i]In this project, there is a plant manager function node. As the name suggests, the plant manager can help you automatically take care of...
dql2016 onsemi and Avnet IoT Innovation Design Competition
What does WARNING:PhysDesignRules:812 mean in Xilinx ISE?
My specific problem appears in the "generating program file" step: WARNING:PhysDesignRules:812 - Dangling pinon block::. What does DOA mean? ram_top and RAM0 are subroutines in my program. Mram_ram2.A...
宁宁1989 FPGA/CPLD
[Repost] High-speed unbuffered ADC backlash
With so many different types and suppliers of high-speed analog-to-digital converters (ADCs) available today, choosing the right one can be a challenge. Once you’ve narrowed your search, the decision ...
dontium ADI Reference Circuit
AM79C874 network interface circuit diagram
AM79C874 network interface circuit diagram...
klanlan Industrial Control Electronics
error -145 whilst initializing MMC card
SD card initialization failed and the device can no longer be seen under /dev. What could be the reason?...
wzhang04 Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1551  1876  1766  1571  315  32  38  36  7  6 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号