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STUD624S

Description
Super high dense cell design for low RDS(ON).
File Size108KB,8 Pages
ManufacturerSAMHOP
Websitehttp://www.samhop.com.tw
Download Datasheet View All

STUD624S Overview

Super high dense cell design for low RDS(ON).

Gre
r
Pro
STU/D624S
Ver 1.0
SamHop Microelectronics Corp.
N-Channel Logic Level Enhancement Mode Field Effect Transistor
PRODUCT SUMMARY
V
DSS
60V
FEATURES
Super high dense cell design for low R
DS(ON)
.
Rugged and reliable.
TO-252 and TO-251 Package.
@VGS=10V
@VGS=4.5V
I
D
35A
R
DS(ON)
(m ) Max
17.5
30
G
S
G
D
S
STU SERIES
TO-252AA(D-PAK)
STD SERIES
TO-251(I-PAK)
ABSOLUTE MAXIMUM RATINGS (
T
C
=25
°
C unless otherwise noted
)
Symbol
V
DS
V
GS
I
D
I
DM
E
AS
P
D
T
J,
T
STG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
-Pulsed
b
d
a
Limit
60
±20
T
C
=25°C
T
C
=70°C
35
28
102
144
T
C
=25°C
T
C
=70°C
42
27
-55 to 150
Units
V
V
A
A
A
mJ
W
W
°C
Single Pulse Avalanche Energy
Maximum Power Dissipation
a
Operating Junction and Storage
Temperature Range
THERMAL CHARACTERISTICS
R
JC
R
JA
Thermal Resistance, Junction-to-Case
a
a
3
50
°C/W
°C/W
Thermal Resistance, Junction-to-Ambient
Details are subject to change without notice.
Aug,01,2011
1
www.samhop.com.tw
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