OP249_15 datasheet, PDF - EEWORLD Datasheet

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OP249_15: DescriptionPrecision JFET, High Speed, Dual Operational Amplifier; File Size443KB，20 Pages; ManufacturerADI; Websitehttps://www.analog.com

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OP249_15 Overview

Precision JFET, High Speed, Dual Operational Amplifier

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Data Sheet

FEATURES

Fast slew rate: 22 V/µs typical

Settling time (0.01%): 1.2 µs maximum

Offset voltage: 200 µV typical

High open-loop gain: 1000 V/mV minimum

Low total harmonic distortion: 0.002% typical

Precision JFET, High Speed,

Dual Operational Amplifier

OP249

PIN CONFIGURATIONS

OUT A

–IN A

+IN A

V–

OP249

V+

OUT B

00296-001

00296-002

–IN B

+IN B

Figure 1. 8-Lead CERDIP (Q-8) and

8-Lead PDIP (N-8)

+IN A

V–

+IN B

–IN B

APPLICATIONS

Output amplifier for fast DACs

Signal processing

Instrumentation amplifiers

Fast sample-and-holds

Active filters

Low distortion audio amplifiers

Input buffer for ADCs

Servo controllers

–IN A

OUT A

V+

OUT B

OP249

Figure 2. 8-Lead SOIC (R-8)

GENERAL DESCRIPTION

The

OP249

is a high speed, precision dual JFET op amp, similar

to the popular single op amp. The

OP249

outperforms available

dual amplifiers by providing superior speed with excellent dc

performance. Ultrahigh open-loop gain (1 kV/mV minimum),

low offset voltage, and superb gain linearity makes the

OP249

the industry’s first true precision, dual high speed amplifier.

With a slew rate of 22 V/µs typical and a fast settling time of less

than 1.2 µs maximum to 0.01%, the

OP249

is an ideal choice for

high speed bipolar DAC and ADC applications. The excellent

dc performance of the

OP249

allows the full accuracy of high

resolution CMOS DACs to be realized.

Symmetrical slew rate, even when driving large load, such as,

600 Ω or 200 pF of capacitance and ultralow distortion, make

the

OP249

ideal for professional audio applications, active filters,

high speed integrators, servo systems, and buffer amplifiers.

0.01

870ns

100

= 25°C

= ±15V

= 10V p-p

= 10kΩ

= 1

100

00296-003

00296-004

10mV

500ns

1µs

0.001

100

10k 20k

Figure 3. Fast Settling (0.01%)

Figure 4. Low Distortion, A

= 1, R

= 10 kΩ

Figure 5. Excellent Output Drive, R

= 600 Ω

Rev. H

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

Document Feedback

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

00296-005

OP249

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Pin Configurations ........................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics ............................................................. 3

Absolute Maximum Ratings............................................................ 6

ESD Caution .................................................................................. 6

Data Sheet

Typical Performance Characteristics ..............................................7

Applications Information .............................................................. 13

Open-Loop Gain Linearity ....................................................... 14

Offset Voltage Adjustment ........................................................ 14

Settling Time ............................................................................... 14

DAC Output Amplifier .............................................................. 15

Discussion on Driving ADCs ................................................... 16

Outline Dimensions ....................................................................... 17

Ordering Guide .......................................................................... 18

REVISION HISTORY

11/13—Rev. G to Rev. H

Changes to Figure 39 and Figure 41 ............................................. 13

4/10—Rev. F to Rev. G

Changes to Features Section and General Description Section . 1

Changes to Offset Voltage Parameter, Table 1 .............................. 3

Deleted Long Term Offset Voltage Parameter and

Note 1, Table 1 ................................................................................... 3

Changes to Offset Voltage Parameter, Offset Voltage

Temperature Coefficient Parameter, and Note 1, Table 3 ........... 5

Delete OP249F Columns, Table 3................................................... 5

Changes to Offset Voltage Parameter and Offset Voltage

Temperature Coefficient Parameter, Table 4................................. 5

Inserted OP249F Columns, Table 4 ............................................... 5

Changes to Discussion on Driving ADCs Section ..................... 16

Deleted Figure 52 and Figure 53 ................................................... 17

5/07—Rev. E to Rev. F

Updated Format .................................................................. Universal

Changes to Table 1 ............................................................................ 3

Changes to Table 2 ............................................................................ 4

Changes to Table 3 and Table 4 ....................................................... 5

Changes to Table 5 ............................................................................ 6

Changes to Figure 31 ...................................................................... 11

Changes to Figure 37 and Figure 38 ............................................. 12

Deleted OP249 SPICE Macro-Model Section ............................ 14

Deleted Figure 18; Renumbered Sequentially ............................ 14

Deleted Table I ................................................................................ 15

Changes to Discussion on Driving ADCs Section ..................... 17

Updated Outline Dimensions ....................................................... 18

Changes to Ordering Guide .......................................................... 19

9/01—Rev. D to Rev. E

Edits to Features and Pin Connections ..........................................1

Edits to Electrical Characteristics .............................................. 2, 3

Edits to Absolute Maximum Ratings, Package Type, and

Ordering Guide..................................................................................4

Deleted Wafer Test Limits and Dice Characteristics Section ......5

Edits to Typical Performance Characteristics ................................8

Edits to Macro-Model Figure........................................................ 15

Edits to Outline Dimensions......................................................... 17

Rev. H | Page 2 of 20

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