MUN5312DW1T3 datasheet, PDF - EEWORLD Datasheet

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MUN5312DW1T3: Description100mA, 50V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR, CASE 419B-01, 6 PIN; CategoryDiscrete semiconductor The transistor; File Size307KB，16 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn

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MUN5312DW1T3 Overview

100mA, 50V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR, CASE 419B-01, 6 PIN

MUN5312DW1T3 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ON Semiconductor
package instruction	CASE 419B-01, 6 PIN
Contacts	6
Manufacturer packaging code	CASE 419B-01
Reach Compliance Code	not_compliant
ECCN code	EAR99
Other features	BUILT-IN BIAS RESISTOR RATIO IS 1, DIGITAL
Maximum collector current (IC)	0.1 A
Collector-emitter maximum voltage	50 V
Configuration	SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)	60
JESD-30 code	R-PDSO-G6
JESD-609 code	e0
Number of components	2
Number of terminals	6
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Polarity/channel type	NPN AND PNP
Maximum power dissipation(Abs)	0.15 W
Certification status	Not Qualified
surface mount	YES
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
transistor applications	SWITCHING
Transistor component materials	SILICON

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

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by MUN5311DW1T1/D

Dual Bias Resistor Transistors

NPN and PNP Silicon Surface Mount Transistors

with Monolithic Bias Resistor Network

The BRT (Bias Resistor Transistor) contains a single transistor with a

monolithic bias network consisting of two resistors; a series base resistor and a

base–emitter resistor. These digital transistors are designed to replace a single

device and its external resistor bias network. The BRT eliminates these

individual components by integrating them into a single device. In the

MUN5311DW1T1 series, two complementary BRT devices are housed in the

SOT–363 package which is ideal for low power surface mount applications

where board space is at a premium.

•

Simplifies Circuit Design

•

Reduces Board Space

•

Reduces Component Count

•

Available in 8 mm, 7 inch/3000 Unit Tape and Reel.

MUN5311DW1T1

SERIES

Motorola Preferred Devices

CASE 419B–01, STYLE 1

SOT–363

(3)

(2)

(1)

(4)

(5)

(6)

MAXIMUM RATINGS

(TA = 25°C unless otherwise noted, common for Q1 and Q2, – minus sign for Q1 (PNP) omitted)

Rating

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Symbol

VCBO

VCEO

θJA

TJ, Tstg

Marking

R1 (K)

4.7

1.0

2.2

4.7

2.2

Value

100

Unit

Vdc

mAdc

°C/W

°C

THERMAL CHARACTERISTICS

Thermal Resistance — Junction-to-Ambient (surface mounted)

Operating and Storage Temperature Range

Total Package Dissipation @ TA = 25°C(1)

833

– 65 to +150

*150

DEVICE MARKING AND RESISTOR VALUES: MUN5311DW1T1 SERIES

Device

MUN5311DW1T1

MUN5312DW1T1

MUN5313DW1T1

MUN5314DW1T1

MUN5315DW1T1(2)

MUN5316DW1T1(2)

MUN5330DW1T1(2)

MUN5331DW1T1(2)

MUN5332DW1T1(2)

MUN5333DW1T1(2)

MUN5334DW1T1(2)

MUN5335DW1T1(2)

R2 (K)

∞

1.0

2.2

4.7

1. Device mounted on a FR-4 glass epoxy printed circuit board using the minimum recommended footprint.

2. New resistor combinations. Updated curves to follow in subsequent data sheets.

Thermal Clad is a trademark of the Bergquist Company

Preferred

devices are Motorola recommended choices for future use and best overall value.

REV 5

Motorola Small–Signal Transistors, FETs and Diodes Device Data

Motorola, Inc. 1997

MUN5312DW1T3 Related Products

	MUN5312DW1T3	MUN5316DW1T2
Description	100mA, 50V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR, CASE 419B-01, 6 PIN	100mA, 50V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR, CASE 419B-01, 6 PIN
Maker	ON Semiconductor	ON Semiconductor
package instruction	CASE 419B-01, 6 PIN	SMALL OUTLINE, R-PDSO-G6
Contacts	6	6
Manufacturer packaging code	CASE 419B-01	CASE 419B-01
Reach Compliance Code	not_compliant	unknown
ECCN code	EAR99	EAR99
Maximum collector current (IC)	0.1 A	0.1 A
Collector-emitter maximum voltage	50 V	50 V
Configuration	SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR	SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)	60	160
JESD-30 code	R-PDSO-G6	R-PDSO-G6
Number of components	2	2
Number of terminals	6	6
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE
Polarity/channel type	NPN AND PNP	NPN AND PNP
Certification status	Not Qualified	Not Qualified
surface mount	YES	YES
Terminal form	GULL WING	GULL WING
Terminal location	DUAL	DUAL
Transistor component materials	SILICON	SILICON

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