Philips Semiconductors
Product data
Octal transceiver with 8-bit parity generator/checker
74F657
FEATURES
•
Combines 74F245 and 74F280A functions in one package
•
High impedance base input for reduced loading (70
µA
in HIGH
and LOW states)
The parity (PARITY) pin is an output from the generator/checker
when transmitting from the port A to B (T/R = HIGH) and an input
when receiving from port B to A port ( T/R = LOW).
When transmitting (T/R = HIGH) the parity select (ODD/EVEN) input
is set, then the A port data is polled to determined the number of
high bits. The parity (PARITY) output then goes to the logic state
determined by the parity select (ODD/EVEN) setting and by the
number of high bits on port A.
For example, if the parity select (ODD/EVEN) is set LOW (even
parity), and the number of high bits on port A is odd, then the parity
(PARITY) output will be HIGH, transmitting even parity. If the
number of high bits on port A is even, then the parity (PARITY)
output will be LOW, keeping even parity.
When in receive mode (T/R = LOW) the B port is polled to determine
the number of high bits. If parity select (ODD/EVEN) is LOW (even
parity) and the number of highs on port B is:
(1) odd and the parity (PARITY) input is HIGH, then ERROR will be
HIGH, significantly no error.
(2) even and the parity (PARITY) input is HIGH, then ERROR will be
asserted LOW, indicating an error.
TYPE
TYPICAL
PROPAGATION
DELAY
8.0ns
TYPICAL SUPPLY
CURRENT (TOTAL)
100 mA
•
Ideal in applications where high output drive and light bus loading
•
3-state buffer outputs sink 64 mA and source 15 mA
•
Input diodes for termination effects
•
24-pin plastic slim DIP (300 mil) package
•
Industrial temperature range available (–40
°C
to +85
°C)
DESCRIPTION
The 74F657 is an octal transceiver featuring non-inverting buffers
with 3-state outputs and an 8-bit parity generator/checker, and is
intended for bus-oriented applications. The buffers have a
guaranteed current sinking capability of 24 mA at the A ports and
64 mA at the B ports. The transmit/receive (T/R) input determines
the direction of the data flow through the bidirectional transceivers.
Transmit (active HIGH) enables data from A ports to B ports; receive
(active LOW) enables data from B ports to A ports.
The output enable (OE) input disables both the A and B ports by
placing them in a high impedance condition when the OE input is
HIGH.
The parity select (ODD/EVEN) input gives the user the option of
odd or even parity systems.
are required (I
IL
is 70
µA
versus FAST std of 600
µA)
74F657
ORDERING INFORMATION
ORDER CODE
COMMERCIAL RANGE
DESCRIPTION
24-pin plastic slim DIP (300 mil)
24-pin plastic SOL
V
CC
= 5 V
±
10%,
T
amb
= 0
°C
to +70
°C
N74F657N
N74F657D
INDUSTRIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= –40
°C
to +85
°C
I74F657N
I74F657D
PKG DWG #
SOT222-1
SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
A0–A7
B0–B7
PARITY
T/R
ODD/EVEN
OE
A0–A7
B0–B7
PARITY
ERROR
A ports 3–state inputs
B ports 3–state inputs
Parity input
Transmit/receive input
Parity select input
Output enable input (active LOW)
A ports 3–state outputs
B ports 3–state outputs
Parity output
Error output
DESCRIPTION
74F (U.L.)
HIGH / LOW
3.5 / 0.117
3.5 / 0.117
3.5 / 0.117
2.0 / 0.066
1.0 / 0.033
2.0 / 0.066
150 / 40
750 / 106.7
750 / 106.7
750 / 106.7
LOAD VALUE
HIGH / LOW
70
µA
/ 70
µA
70
µA
/ 70
µA
70
µA
/ 70
µA
40
µA
/ 40
µA
20
µA
/ 20
µA
40
µA
/ 40
µA
3.0 mA / 24 mA
15 mA / 64 mA
15 mA / 64 mA
15 mA / 64 mA
NOTE:
1. One (1.0) FAST unit load is defined as: 20
µA
in the HIGH state and 0.6 mA in the LOW state.
2003 Feb 04
2
853 1117 00081
Philips Semiconductors
Product data
Octal transceiver with 8-bit parity generator/checker
74F657
FUNCTION TABLE
NUMBER OF INPUTS THAT ARE HIGH
OE
L
L
L
L
L
L
L
L
L
L
L
L
H
INPUTS
T/R
H
H
L
L
L
L
H
H
L
L
L
L
X
ODD/EVEN
H
L
H
H
L
L
H
L
H
H
L
L
X
INPUT/OUTPUT
PARITY
H
L
H
L
H
L
L
H
H
L
H
L
Z
ERROR
Z
Z
H
L
L
H
Z
Z
L
H
H
L
Z
OUTPUTS
OUTPUTS MODE
Transmit
Transmit
Receive
Receive
Receive
Receive
Transmit
Transmit
Receive
Receive
Receive
Receive
Z
0, 2 4 6
0 2, 4, 6, 8
1, 3, 5,
1 3 5 7
Don’t care
Notes to function table
1. H = High voltage level
2. L = Low voltage level
3. X = Don’t care
4. Z = High impedance “off” state
ABSOLUTE MAXIMUM RATINGS
Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
Supply voltage
Input voltage
Input current
Voltage applied to output in HIGH output state
Current applied to output in LOW output state
A0–A7
B0–B7, PARITY, ERROR
Operating free air temperature range
Commercial range
Industrial range
T
stg
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
48
128
0 to +70
–40 to +85
–65 to +150
UNIT
V
V
mA
V
mA
mA
°C
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
MIN
V
CC
V
IH
V
IL
I
Ik
I
OH
Supply voltage
HIGH-level input voltage
LOW-level input voltage
Input clamp current
HIGH-level output current
A0–A7
B0–B7, PARITY, ERROR
I
OL
LOW-level output current
A0–A7
B0–B7, PARITY, ERROR
T
amb
Operating free air temperature range
Commercial range
Industrial range
2003 Feb 04
5
0
–40
4.5
2.0
0.8
–18
–3
–15
24
64
+70
+85
LIMITS
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
mA
mA
°C
°C
UNIT
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