8312AY datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> 8312AY

8312AY: DescriptionLow Skew Clock Driver, 8312 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32; Categorylogic logic; File Size1MB，18 Pages; ManufacturerIDT (Integrated Device Technology)

Download Datasheet Parametric Compare View All

8312AY Overview

Low Skew Clock Driver, 8312 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32

8312AY Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFP
package instruction	LQFP, QFP32,.35SQ,32
Contacts	32
Reach Compliance Code	not_compliant
ECCN code	EAR99
Other features	ALSO OPERATES AT 2.5V/3.3V SUPPLY
series	8312
Input adjustment	STANDARD
JESD-30 code	S-PQFP-G32
JESD-609 code	e0
length	7 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
MaximumI(ol)	0.001 A
Humidity sensitivity level	3
Number of functions	1
Number of inverted outputs
Number of terminals	32
Actual output times	12
Maximum operating temperature	85 °C
Minimum operating temperature
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP32,.35SQ,32
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	240
power supply	1.8/3.3 V
Prop。Delay @ Nom-Sup	4.8 ns
propagation delay (tpd)	4.8 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.15 ns
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	2 V
Minimum supply voltage (Vsup)	1.6 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
Temperature level	OTHER
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	7 mm

8312AY Preview

LOW SKEW, 1-TO-12 LVCMOS/LVTTL

FANOUT BUFFER

ICS8312

Features

•

Twelve LVCMOS/LVTTL outputs

CLK input supports the following input types: LVCMOS, LVTTL

Maximum output frequency: 250MHz

Output skew: 150ps (maximum)

Supply modes:

Core/Output

3.3V/3.3V

3.3V/2.5V

3.3V/1.8V

2.5V/2.5V

2.5V/1.8V

1.8V/1.8V

0°C to 85°C ambient operating temperature

Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

General Description

The ICS8312 is a low skew, 1-to-12 LVCMOS/

LVTTL Fanout Buffer and a member of the

HiPerClockS™

HiPerClockS™ family of High Performance Clock

Solutions from IDT. The ICS8312 single-ended clock

input accepts LVCMOS or LVTTL input levels. The

low impedance LVCMOS outputs are designed to drive 50Ω series

or parallel terminated transmission lines. The effective fanout can

be increased from 12 to 24 by utilizing the ability of the outputs to

drive two series terminated lines.

ICS

The ICS8312 is characterized at full 3.3V, 2.5V, and 1.8V, mixed

3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply

modes. Guaranteed output and part-to-part skew characteristics

along with the 1.8V output capabilities makes the ICS8312 ideal

for high performance, single ended applications that also require a

limited output voltage.

•

Block Diagram

CLK_EN

Pullup

Pin Assignment

GND

CLK_EN

32 31 30 29 28 27 26 25

Q11

GND

DDO

10 11 12 13 14 15 16

GND

DDO

GND

Q10

DDO

GND

DDO

GND

CLK

Pulldown

Q[0:11]

CLK

GND

Pullup

GND

ICS8312

32-Lead LQFP

7mm x 7mm x 1.4mm package body

Y Package

Top View

IDT™ / ICS™

LVCMOS/LVTTL FANOUT BUFFER

ICS8312AY REV. D JULY 3, 2008

ICS8312

LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER

Table 1. Pin Descriptions

Number

1, 5, 8, 12, 16,

17, 21, 25, 29

2, 7

9, 11, 13, 15,

18, 20, 22, 24,

26, 28, 30, 32

10, 14, 19, 23,

27, 31

Name

GND

CLK_EN

CLK

Q11, Q10, Q9, Q8,

Q7, Q6, Q5, Q4,

Q3, Q2, Q1, Q0

DDO

Power

Input

Pullup

Pulldown

Pullup

Type

Description

Power supply ground.

Positive supply pins.

Synchronous control for enabling and disabling clock outputs.

LVCMOS / LVTTL interface levels.

Single-ended clock input. LVCMOS/LVTTL interface levels.

Output enable. Controls enabling and disabling of outputs Q[0:11].

LVCMOS / LVTTL interface levels.

Single-ended clock outputs. LVCMOS/LVTTL interface levels.

Output

Power

Output supply pins.

NOTE:

Pullup and Pulldown

refer to internal input resistors. See Table 2,

Pin Characteristics,

for typical values.

Table 2. Pin Characteristics

Symbol

PULLUP

PULLDOWN

Parameter

Input Capacitance

Input Pullup Resistor

Input Pulldown Resistor

DDO

= 3.465V

Power Dissipation Capacitance

(per output)

DDO

= 2.625V

DDO

= 2V

DDO

= 3.3V ± 5%

OUT

Output Impedance

DDO

= 2.5V ± 5%

DDO

= 1.8V ± 0.2V

Test Conditions

Minimum

Typical

Maximum

Units

Ω

IDT™ / ICS™

LVCMOS/LVTTL FANOUT BUFFER

ICS8312AY REV. D JULY 3, 2008

ICS8312

LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER

Function Tables

Table 3A. Output Enable and Clock Enable Function Table

Inputs

CLK_EN

Outputs

Q [0:11]

Hi-Z

LOW

Follows CLK input

Table 3B. Output Enable and Clock Enable Function Table

Inputs

CLK_EN

CLK

Outputs

Q [0:11]

LOW

HIGH

IDT™ / ICS™

LVCMOS/LVTTL FANOUT BUFFER

ICS8312AY REV. D JULY 3, 2008

ICS8312

LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER

Absolute Maximum Ratings

NOTE: Stresses beyond those listed under

Absolute Maximum Ratings

may cause permanent damage to the device.

These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond

those listed in the

DC Characteristics or AC Characteristics

is not implied. Exposure to absolute maximum rating conditions for

extended periods may affect product reliability.

Item

Supply Voltage, V

Inputs, V

Outputs, V

Package Thermal Impedance,

Storage Temperature, T

STG

Rating

4.6V

-0.5V to V

+ 0.5V

-0.5V to V

DDO

+ 0.5V

47.9°C/W (0 lfpm)

-65°C to 150°C

DC Electrical Characteristics

Table 4A. Power Supply DC Characteristics,

= V

DDO

= 3.3V ± 5%, T

= 0°C to 85°C

Symbol

DDO

Parameter

Positive Supply Voltage

Output Supply Voltage

Power Supply Current

Output Supply Current

Test Conditions

Minimum

3.135

Typical

3.3

Maximum

3.465

Units

Table 4B. Power Supply DC Characteristics,

= V

DDO

= 2.5V ± 5%, T

= 0°C to 85°C

Symbol

DDO

Parameter

Positive Supply Voltage

Output Supply Voltage

Power Supply Current

Output Supply Current

Test Conditions

Minimum

2.375

Typical

2.5

Maximum

2.625

Units

Table 4C. Power Supply DC Characteristics,

= V

DDO

= 1.8V ± 0.2V, T

= 0°C to 85°C

Symbol

DDO

Parameter

Positive Supply Voltage

Output Supply Voltage

Power Supply Current

Output Supply Current

Test Conditions

Minimum

1.6

Typical

1.8

Maximum

2.0

Units

IDT™ / ICS™

LVCMOS/LVTTL FANOUT BUFFER

ICS8312AY REV. D JULY 3, 2008

ICS8312

LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER

Table 4D. Power Supply DC Characteristics,

= 3.3V ± 5%, V

DDO

= 2.5V ± 5%, T

= 0°C to 85°C

Symbol

DDO

Parameter

Positive Supply Voltage

Output Supply Voltage

Power Supply Current

Output Supply Current

Test Conditions

Minimum

3.135

2.375

Typical

3.3

2.5

Maximum

3.465

2.625

Units

Table 4E. Power Supply DC Characteristics,

= 3.3V ± 5%, V

DDO

= 1.8V ±0.2V, T

= 0°C to 85°C

Symbol

DDO

Parameter

Positive Supply Voltage

Output Supply Voltage

Power Supply Current

Output Supply Current

Test Conditions

Minimum

3.135

1.6

Typical

3.3

1.8

Maximum

3.465

2.0

Units

Table 4F. Power Supply DC Characteristics,

= 2.5V ± 5%, V

DDO

= 1.8V ±0.2V, T

= 0°C to 85°C

Symbol

DDO

Parameter

Positive Supply Voltage

Output Supply Voltage

Power Supply Current

Output Supply Current

Test Conditions

Minimum

2.375

1.6

Typical

2.5

1.8

Maximum

2.625

2.0

Units

IDT™ / ICS™

LVCMOS/LVTTL FANOUT BUFFER

ICS8312AY REV. D JULY 3, 2008

More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

8312AY Related Products

	8312AY	8312AYT
Description	Low Skew Clock Driver, 8312 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32	Low Skew Clock Driver, 8312 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32
Is it lead-free?	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QFP	QFP
package instruction	LQFP, QFP32,.35SQ,32	LQFP, QFP32,.35SQ,32
Contacts	32	32
Reach Compliance Code	not_compliant	not_compliant
ECCN code	EAR99	EAR99
Other features	ALSO OPERATES AT 2.5V/3.3V SUPPLY	ALSO OPERATES AT 2.5V/3.3V SUPPLY
series	8312	8312
Input adjustment	STANDARD	STANDARD
JESD-30 code	S-PQFP-G32	S-PQFP-G32
JESD-609 code	e0	e0
length	7 mm	7 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
MaximumI(ol)	0.001 A	0.001 A
Humidity sensitivity level	3	3
Number of functions	1	1
Number of terminals	32	32
Actual output times	12	12
Maximum operating temperature	85 °C	85 °C
Output characteristics	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	LQFP
Encapsulate equivalent code	QFP32,.35SQ,32	QFP32,.35SQ,32
Package shape	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	240	240
power supply	1.8/3.3 V	1.8/3.3 V
Prop。Delay @ Nom-Sup	4.8 ns	4.8 ns
propagation delay (tpd)	4.8 ns	4.8 ns
Certification status	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.15 ns	0.15 ns
Maximum seat height	1.6 mm	1.6 mm
Maximum supply voltage (Vsup)	2 V	2 V
Minimum supply voltage (Vsup)	1.6 V	1.6 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V
surface mount	YES	YES
Temperature level	OTHER	OTHER
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING	GULL WING
Terminal pitch	0.8 mm	0.8 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	20	20
width	7 mm	7 mm

Recommended Resources

Infrared remote control dimming circuit b

Proportional temperature controller circuit

CA3080 variable gain amplifier circuit

Infrared detector circuit

Multiple motor self-excited braking circuit

Computer motherboard circuit diagram 815 5_19

LED display extensive knowledge: ...; 探路者 Power technology

Newbie help!: In the circuit in the figure, the voltage value of the voltage regulator is Uz=6v, and the minimum value of the stable current is Izmin=5mA. How many volts is Uo2? The answer is 5v, but I still don't ...; 过去的轨迹 Analog electronics

Participate in the HELPER2416 development board student aid program --- u-boot command line mode experience: 板子重启后，三秒钟内在串口0上面随意输入字符，然后输入help命令看到如下结果Helper2416 # help ?- alias for 'help' autoscr - run script from memory base- print or set address offset bdinfo- print Board Info structure boot- boot default, i...; youzizhile Embedded System

Summer promotion for newly registered users of e-Network is here!: [align=left][font=微软雅黑][size=4][color=#4169e1][b]e-Network Alliance[/b][/color] is an authorized distributor of more than 3,500 manufacturers worldwide, providing more than 600,000 products, all of wh...; eric_wang Talking

The difference between DC-DC and linear regulator: What is the difference between a DC-DC and a linear regulator? Can you explain it in detail? :)...; xingkong Power technology

Samsung 2440BSP system immediately runs out of screen after waking up: I'm working on a 2440 project recently. I modified the BSP provided by the development board manufacturer. Now the CPU can sleep normally and enter the system when awakened. After entering, the system...; 6666666 Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components