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8312AYT

Description
Low Skew Clock Driver, 8312 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32
Categorylogic    logic   
File Size1MB,18 Pages
ManufacturerIDT (Integrated Device Technology)
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8312AYT Overview

Low Skew Clock Driver, 8312 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32

8312AYT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instructionLQFP, QFP32,.35SQ,32
Contacts32
Reach Compliance Codenot_compliant
ECCN codeEAR99
Other featuresALSO OPERATES AT 2.5V/3.3V SUPPLY
series8312
Input adjustmentSTANDARD
JESD-30 codeS-PQFP-G32
JESD-609 codee0
length7 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
MaximumI(ol)0.001 A
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals32
Actual output times12
Maximum operating temperature85 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP32,.35SQ,32
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)240
power supply1.8/3.3 V
Prop。Delay @ Nom-Sup4.8 ns
propagation delay (tpd)4.8 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.15 ns
Maximum seat height1.6 mm
Maximum supply voltage (Vsup)2 V
Minimum supply voltage (Vsup)1.6 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width7 mm

8312AYT Preview

LOW SKEW, 1-TO-12 LVCMOS/LVTTL
FANOUT BUFFER
ICS8312
Features
Twelve LVCMOS/LVTTL outputs
CLK input supports the following input types: LVCMOS, LVTTL
Maximum output frequency: 250MHz
Output skew: 150ps (maximum)
Supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
1.8V/1.8V
0°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
General Description
The ICS8312 is a low skew, 1-to-12 LVCMOS/
LVTTL Fanout Buffer and a member of the
HiPerClockS™
HiPerClockS™ family of High Performance Clock
Solutions from IDT. The ICS8312 single-ended clock
input accepts LVCMOS or LVTTL input levels. The
low impedance LVCMOS outputs are designed to drive 50Ω series
or parallel terminated transmission lines. The effective fanout can
be increased from 12 to 24 by utilizing the ability of the outputs to
drive two series terminated lines.
ICS
The ICS8312 is characterized at full 3.3V, 2.5V, and 1.8V, mixed
3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply
modes. Guaranteed output and part-to-part skew characteristics
along with the 1.8V output capabilities makes the ICS8312 ideal
for high performance, single ended applications that also require a
limited output voltage.
Block Diagram
CLK_EN
Pullup
Pin Assignment
GND
D
Q
LE
GND
V
DD
CLK_EN
12
32 31 30 29 28 27 26 25
1
2
3
4
5
6
7
8
9
Q11
Q1
GND
V
DDO
V
DDO
Q2
Q3
Q0
24
23
22
21
20
19
18
17
10 11 12 13 14 15 16
GND
V
DDO
V
DDO
GND
Q10
Q9
Q8
Q4
V
DDO
Q5
GND
Q6
V
DDO
Q7
GND
CLK
Pulldown
Q[0:11]
CLK
GND
OE
OE
Pullup
V
DD
GND
ICS8312
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
IDT™ / ICS™
LVCMOS/LVTTL FANOUT BUFFER
1
ICS8312AY REV. D JULY 3, 2008
ICS8312
LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Table 1. Pin Descriptions
Number
1, 5, 8, 12, 16,
17, 21, 25, 29
2, 7
3
4
6
9, 11, 13, 15,
18, 20, 22, 24,
26, 28, 30, 32
10, 14, 19, 23,
27, 31
Name
GND
V
DD
CLK_EN
CLK
OE
Q11, Q10, Q9, Q8,
Q7, Q6, Q5, Q4,
Q3, Q2, Q1, Q0
V
DDO
Power
Power
Input
Input
Input
Pullup
Pulldown
Pullup
Type
Description
Power supply ground.
Positive supply pins.
Synchronous control for enabling and disabling clock outputs.
LVCMOS / LVTTL interface levels.
Single-ended clock input. LVCMOS/LVTTL interface levels.
Output enable. Controls enabling and disabling of outputs Q[0:11].
LVCMOS / LVTTL interface levels.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
Output
Power
Output supply pins.
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
V
DDO
= 3.465V
C
PD
Power Dissipation Capacitance
(per output)
V
DDO
= 2.625V
V
DDO
= 2V
V
DDO
= 3.3V ± 5%
R
OUT
Output Impedance
V
DDO
= 2.5V ± 5%
V
DDO
= 1.8V ± 0.2V
7
7
10
Test Conditions
Minimum
Typical
4
51
51
19
18
16
Maximum
Units
pF
k
k
pF
pF
pF
IDT™ / ICS™
LVCMOS/LVTTL FANOUT BUFFER
2
ICS8312AY REV. D JULY 3, 2008
ICS8312
LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Function Tables
Table 3A. Output Enable and Clock Enable Function Table
Inputs
OE
0
1
1
CLK_EN
X
0
1
Outputs
Q [0:11]
Hi-Z
LOW
Follows CLK input
Table 3B. Output Enable and Clock Enable Function Table
Inputs
OE
1
1
CLK_EN
1
1
CLK
0
1
Outputs
Q [0:11]
LOW
HIGH
IDT™ / ICS™
LVCMOS/LVTTL FANOUT BUFFER
3
ICS8312AY REV. D JULY 3, 2008
ICS8312
LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
DD
Inputs, V
I
Outputs, V
O
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
DD
+ 0.5V
-0.5V to V
DDO
+ 0.5V
47.9°C/W (0 lfpm)
-65°C to 150°C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
DD
= V
DDO
= 3.3V ± 5%, T
A
= 0°C to 85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
10
10
Units
V
V
mA
mA
Table 4B. Power Supply DC Characteristics,
V
DD
= V
DDO
= 2.5V ± 5%, T
A
= 0°C to 85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
2.375
2.375
Typical
2.5
2.5
Maximum
2.625
2.625
10
10
Units
V
V
mA
mA
Table 4C. Power Supply DC Characteristics,
V
DD
= V
DDO
= 1.8V ± 0.2V, T
A
= 0°C to 85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
1.6
1.6
Typical
1.8
1.8
Maximum
2.0
2.0
10
10
Units
V
V
mA
mA
IDT™ / ICS™
LVCMOS/LVTTL FANOUT BUFFER
4
ICS8312AY REV. D JULY 3, 2008
ICS8312
LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Table 4D. Power Supply DC Characteristics,
V
DD
= 3.3V ± 5%, V
DDO
= 2.5V ± 5%, T
A
= 0°C to 85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
3.135
2.375
Typical
3.3
2.5
Maximum
3.465
2.625
10
10
Units
V
V
mA
mA
Table 4E. Power Supply DC Characteristics,
V
DD
= 3.3V ± 5%, V
DDO
= 1.8V ±0.2V, T
A
= 0°C to 85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
3.135
1.6
Typical
3.3
1.8
Maximum
3.465
2.0
10
10
Units
V
V
mA
mA
Table 4F. Power Supply DC Characteristics,
V
DD
= 2.5V ± 5%, V
DDO
= 1.8V ±0.2V, T
A
= 0°C to 85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Positive Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
2.375
1.6
Typical
2.5
1.8
Maximum
2.625
2.0
10
10
Units
V
V
mA
mA
IDT™ / ICS™
LVCMOS/LVTTL FANOUT BUFFER
5
ICS8312AY REV. D JULY 3, 2008

8312AYT Related Products

8312AYT 8312AY
Description Low Skew Clock Driver, 8312 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32 Low Skew Clock Driver, 8312 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFP QFP
package instruction LQFP, QFP32,.35SQ,32 LQFP, QFP32,.35SQ,32
Contacts 32 32
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
Other features ALSO OPERATES AT 2.5V/3.3V SUPPLY ALSO OPERATES AT 2.5V/3.3V SUPPLY
series 8312 8312
Input adjustment STANDARD STANDARD
JESD-30 code S-PQFP-G32 S-PQFP-G32
JESD-609 code e0 e0
length 7 mm 7 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
MaximumI(ol) 0.001 A 0.001 A
Humidity sensitivity level 3 3
Number of functions 1 1
Number of terminals 32 32
Actual output times 12 12
Maximum operating temperature 85 °C 85 °C
Output characteristics 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP
Encapsulate equivalent code QFP32,.35SQ,32 QFP32,.35SQ,32
Package shape SQUARE SQUARE
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius) 240 240
power supply 1.8/3.3 V 1.8/3.3 V
Prop。Delay @ Nom-Sup 4.8 ns 4.8 ns
propagation delay (tpd) 4.8 ns 4.8 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.15 ns 0.15 ns
Maximum seat height 1.6 mm 1.6 mm
Maximum supply voltage (Vsup) 2 V 2 V
Minimum supply voltage (Vsup) 1.6 V 1.6 V
Nominal supply voltage (Vsup) 1.8 V 1.8 V
surface mount YES YES
Temperature level OTHER OTHER
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 20 20
width 7 mm 7 mm
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