851010AYILFT datasheet, PDF - EEWORLD Datasheet

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851010AYILFT: DescriptionPTQFP-32, Reel; Categorylogic logic; File Size1MB，18 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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PTQFP-32, Reel

851010AYILFT Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	PTQFP
package instruction	TQFP-32
Contacts	32
Manufacturer packaging code	DXG32
Reach Compliance Code	compliant
ECCN code	EAR99
series	851010
Input adjustment	DIFFERENTIAL
JESD-30 code	S-PQFP-G32
JESD-609 code	e3
length	7 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	3
Number of functions	1
Number of inverted outputs
Number of terminals	32
Actual output times	10
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HTQFP
Encapsulate equivalent code	TQFP32,.35SQ,32
Package shape	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Sup	2.75 ns
propagation delay (tpd)	2.75 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.165 ns
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	7 mm

851010AYILFT Preview

1-to-10, Differential HCSL Fanout Buffer

ICS851010I

DATA SHEET

General Description

The ICS851010I is a 1-to-10 Differential HCSL Fanout Buffer. The

ICS851010I is designed to translate any differential signal levels to

differential HCSL output levels. An external reference resistor is

used to set the value of the current supplied to an external load. The

load resistor value is chosen to equal the value of the characteristic

line impedance of 50Ω. The ICS851010I is characterized at an

operating supply voltage of 3.3V.

The differential HCSL outputs, accurate crossover voltage and

symmetric duty cycle makes the ICS851010I ideal for interfacing to

PCI Express and FBDIMM applications.

Features

•

Ten differential HCSL outputs

Translates any differential input signal (LVPECL, LVHSTL, LVDS,

HCSL) to HCSL levels without external bias networks

Maximum output frequency: 250MHz

Output skew: 165ps (maximum)

Output drift: 140ps (maximum)

: 850mV (maximum)

Additive phase jitter, RMS: 0.19ps (typical)

Full 3.3V supply voltage

Available in lead-free (RoHS 6) package

-40°C to 85°C ambient operating temperature

Block Diagram

CLK

nCLK

nQ0

nQ1

nQ2

nQ3

nQ4

IREF

nQ9

nQ8

nQ7

nQ6

nQ5

Pin Assignment

nCLK

GND

nQ8

CLK

nQ9

32 31 30 29 28 27 26 25

nQ0

nQ1

nQ2

GND

10 11 12 13 14 15 16

IREF

nQ4

nQ3

nQ7

nQ6

nQ5

ICS851010I

32-Lead TQFP, E-Pad

7mm x 7mm x1mm package body

Y Package

Top View

ICS851010AYI REVISION A

AUGUST 2, 2010

ICS851010I Data Sheet

1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER

Table 1. Pin Descriptions

Number

1, 2

3, 8, 13, 14,

17, 22, 30

4, 5

6, 7

9, 25

11, 12

15, 16

18, 19

20, 21

23, 24

28, 29

31, 32

Name

Q0, nQ0

Q1, nQ1

Q2, nQ2

GND

IREF

Q3, nQ3

Q4, nQ4

Q5, nQ5

Q6, nQ6

Q7, nQ7

CLK

nCLK

Q8, nQ8

Q98, nQ9

Type

Output

Power

Output

Power

Input

Output

Input

Output

Description

Differential output pair. Differential HCSL interface levels.

Positive supply pins.

Differential output pair. Differential HCSL interface levels.

Power supply ground.

Reference current input. Used to set the output current. Connect to 950

Ω

resistor to ground.

Differential output pair. Differential HCSL interface levels.

Non-inverting differential input.

Inverting differential clock input.

Differential output pair. Differential HCSL interface levels.

Output Driver Current

The ICS851010I outputs are HCSL differential current drive

with the current being set with a resistor from I

REF

to ground.

For a

single load

and a 50Ω pc board trace, the drive current

would typically be set with a R

REF

of 950Ω which products an I

REF

1.16mA. The I

REF

is multiplied by a current mirror to an output drive of

12*1.16mA or 13.90mA. See

Figure 1

for current mirror and output

drive details.

REF

950Ω

Figure 1. HCSL Current Mirror and Output Drive

ICS851010AYI REVISION A

AUGUST 2, 2010

ICS851010I Data Sheet

1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER

Absolute Maximum Ratings

NOTE: Stresses beyond those listed under

Absolute Maximum Ratings

may cause permanent damage to the device.

These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond

those listed in the

DC Characteristics or AC Characteristics

is not implied. Exposure to absolute maximum rating conditions for

extended periods may affect product reliability.

Item

Supply Voltage, V

Inputs, V

Outputs, I

Package Thermal Impedance,

Storage Temperature, T

STG

Rating

4.6V

-0.5V to V

+ 0.5V

-0.5V to V

+ 0.5V

32.2°C/W (0 mps)

-65°C to 150°C

DC Electrical Characteristics

Table 2A. Power Supply DC Characteristics, V

= 3.3V±5%, T

= -40°C to 85°C

Symbol

Parameter

Core Supply Voltage

Power Supply Current; NOTE 1

Test Conditions

Minimum

3.135

Typical

3.3

Maximum

3.465

105

Units

NOTE 1: Measured using 200MHz input frequency.

Table 2B. Differential DC Characteristics, V

= 3.3V±5%, T

= -40°C to 85°C

Symbol

CMR

Parameter

Input

High Current

Input

Low Current

CLK, nCLK

Test Conditions

= V

= 3.465V

= 3.465V, V

= 0V

0.15

GND + 0.5

Minimum

Typical

Maximum

1.3

– 0.85

Units

µA

Peak-to-Peak Voltage; NOTE 1

Common Mode Input Voltage;

NOTE 1, 2

NOTE 1: V

should not be less than -0.3V.

NOTE 2: Common mode input voltage is defined as V

ICS851010AYI REVISION A

AUGUST 2, 2010

ICS851010I Data Sheet

1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER

AC Electrical Characteristics

Table 3. HCSL AC Characteristics, V

= 3.3V±5%, T

= -40°C to 85°C

Symbol

MAX

tsk(o)

tsk(pp)

tjit

tsk(drift)

MAX

MIN

CROSS

∆V

CROSS

/ t

odc

Parameter

Output Frequency

Propagation Delay, NOTE 1

Output Skew; NOTE 2, 3

Part-to-Part Skew; NOTE 3, 4

Buffer Additive Phase Jitter, RMS

Output Drift; NOTE 5

Absolute Max Output Voltage; NOTE 6

Absolute Min Output Voltage; NOTE 6

Absolute Crossing Voltage;

NOTE 7, 8, 9

Total Variation of V

CROSS

over all

edges; NOTE 7, 8, 10

Rise/Fall Edge Rate; NOTE 11, 12

Output Duty Cycle; NOTE 13

0.6

≤

150MHz

≤

150MHz

500

-150

250

CLK = 155.52MHz, Integration

Range: 12kHz – 20MHz

0.19

140

850

150

550

140

4.0

Measured on at V

1.5

Test Conditions

Minimum

Typical

Maximum

250

2.75

165

800

Units

MHz

V/ns

NOTE:

Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

NOTE:

Current adjust set for V

= 0.7V. Measurements refer to PCIEX outputs only.

NOTE:

Characterized using an R

REF

value of 950

Ω

resistor.

NOTE 1:

Measured from the differential input cross point to the differential output crossing point.

NOTE 2:

Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential output

cross point.

NOTE 3:

This parameter is defined in accordance with JEDEC Standard 65.

NOTE 4:

Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and

with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross point.

NOTE 5:

Output Drift is measured as the change in the time placement of the differential cross point for each output on a given device due to

a change in temperature and supply voltage. Measured at the differential cross point.

NOTE 6:

Measurement using R

REF

= to 950Ω, R

LOAD

= to 50Ω.

NOTE 7:

Measurement taken from single-ended waveform.

NOTE 8:

Measured at crossing point where the instantaneous voltage value of the rising edge of Qx equals the falling edge of nQx.

See Parameter Measurement Information Section.

NOTE 9:

Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing

points for this measurement. See Parameter Measurement Information Section.

NOTE 10:

Defined as the total variation of all crossing voltage of rising Qx and falling nQx. This is the maximum allowed variance in the

CROSS

for any particular system. See Parameter Measurement Information Section.

NOTE 11:

Measurement taken from differential waveform.

NOTE 12:

Measurement from -150mV to +150mV on the differential waveform (derived from Qx minus nQx). The signal must be monotonic

through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential zero crossing.

NOTE 13:

Assuming 50% input duty cycle. Data taken at ƒ

≤

200MHz, unless otherwise specified.

ICS851010AYI REVISION A

AUGUST 2, 2010

ICS851010I Data Sheet

1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER

Parameter Measurement Information

3.3V±5%

SCOPE

VDD

33Ω

49.9Ω

50Ω

Measurement

Point

VDD

50Ω

HCSL

33Ω

GND

49.9Ω

50Ω

2pF

Measurement

Point

GND

2pF

HCSL

50Ω

IREF

950Ω

This load condition is used for I

DD,

tsk(pp), tjit(Ø), t

and tsk(o)

measurements.

HCSL Output Load AC Test Circuit

VDD

nQx

nCLK

Cross Points

CMR

nQy

CLK

GND

tsk(o)

Differential Input Levels

Output Skew

nQx

nQy

Par t 1

nCLK

CLK

Par t 2

nQ[0:9]

Q[0:9]

tsk(pp)

Part-to-Part Skew

Propagation Delay

ICS851010AYI REVISION A

AUGUST 2, 2010

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851010AYILFT Related Products

	851010AYILFT	851010AYILF
Description	PTQFP-32, Reel	PTQFP-32, Tray
Brand Name	Integrated Device Technology	Integrated Device Technology
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	PTQFP	PTQFP
package instruction	TQFP-32	TQFP-32
Contacts	32	32
Manufacturer packaging code	DXG32	DXG32
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
series	851010	851010
Input adjustment	DIFFERENTIAL	DIFFERENTIAL
JESD-30 code	S-PQFP-G32	S-PQFP-G32
JESD-609 code	e3	e3
length	7 mm	7 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	3	3
Number of functions	1	1
Number of terminals	32	32
Actual output times	10	10
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	HTQFP	HTQFP
Encapsulate equivalent code	TQFP32,.35SQ,32	TQFP32,.35SQ,32
Package shape	SQUARE	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, THIN PROFILE	FLATPACK, HEAT SINK/SLUG, THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260
power supply	3.3 V	3.3 V
Prop。Delay @ Nom-Sup	2.75 ns	2.75 ns
propagation delay (tpd)	2.75 ns	2.75 ns
Certification status	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.165 ns	0.165 ns
Maximum seat height	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	GULL WING	GULL WING
Terminal pitch	0.8 mm	0.8 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	30	30
width	7 mm	7 mm

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