HCTS86DMSR datasheet, PDF - EEWORLD Datasheet

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HCTS86DMSR: DescriptionXOR Gate, HCT Series, 4-Func, 2-Input, CMOS, CDIP14; Categorylogic logic; File Size209KB，8 Pages; ManufacturerHarris; Websitehttp://www.harris.com/

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HCTS86DMSR Overview

XOR Gate, HCT Series, 4-Func, 2-Input, CMOS, CDIP14

HCTS86DMSR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Harris
package instruction	DIP, DIP14,.3
Reach Compliance Code	unknown
Other features	RADIATION HARD CMOS/SILICON ON SAPPHIRE (SOS) TECHONOLOGY
series	HCT
JESD-30 code	R-CDIP-T14
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	XOR GATE
MaximumI(ol)	0.00005 A
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Prop。Delay @ Nom-Sup	22 ns
propagation delay (tpd)	20 ns
Certification status	Not Qualified
Schmitt trigger	NO
Filter level	38535V;38534K;883S
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
total dose	200k Rad(Si) V

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HCTS86DMSR Related Products

	HCTS86DMSR	5962R9581401VXC	5962R9581401VCC	HCTS86D/SAMPLE	HCTS86K/SAMPLE	HCTS86KMSR	HCTS86HMSR
Description	XOR Gate, HCT Series, 4-Func, 2-Input, CMOS, CDIP14	XOR Gate, HCT Series, 4-Func, 2-Input, CMOS, CDFP14	XOR Gate, HCT Series, 4-Func, 2-Input, CMOS, CDIP14	XOR Gate, HCT Series, 4-Func, 2-Input, CMOS, CDIP14	XOR Gate, HCT Series, 4-Func, 2-Input, CMOS, CDFP14	XOR Gate, HCT Series, 4-Func, 2-Input, CMOS, CDFP14	XOR Gate, HCT Series, 4-Func, 2-Input, CMOS
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknow
series	HCT	HCT	HCT	HCT	HCT	HCT	HCT
JESD-30 code	R-CDIP-T14	R-CDFP-F14	R-CDIP-T14	R-CDIP-T14	R-CDFP-F14	R-CDFP-F14	X-XUUC-N14
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	XOR GATE	XOR GATE	XOR GATE	XOR GATE	XOR GATE	XOR GATE	XOR GATE
Number of functions	4	4	4	4	4	4	4
Number of entries	2	2	2	2	2	2	2
Number of terminals	14	14	14	14	14	14	14
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	UNSPECIFIED
Package form	IN-LINE	FLATPACK	IN-LINE	IN-LINE	FLATPACK	FLATPACK	UNCASED CHIP
propagation delay (tpd)	20 ns	20 ns	20 ns	20 ns	20 ns	20 ns	20 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	YES	NO	NO	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal form	THROUGH-HOLE	FLAT	THROUGH-HOLE	THROUGH-HOLE	FLAT	FLAT	NO LEAD
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	UPPER
Maker	Harris	-	Harris	Harris	Harris	Harris	Harris
JESD-609 code	e0	e4	e4	-	-	e0	-
Maximum operating temperature	125 °C	125 °C	125 °C	-	-	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-	-	-55 °C	-55 °C
Temperature level	MILITARY	MILITARY	MILITARY	-	-	MILITARY	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)	GOLD	GOLD	-	-	Tin/Lead (Sn/Pb)	-
total dose	200k Rad(Si) V	100k Rad(Si) V	100k Rad(Si) V	-	-	200k Rad(Si) V	-

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