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PYA28C64X-20CWM

Description
EEPROM, 8KX8, 200ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28
Categorystorage    storage   
File Size670KB，10 Pages
ManufacturerPyramid Semiconductor Corporation
Websitehttp://www.pyramidsemiconductor.com/
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PYA28C64X-20CWM Overview

EEPROM, 8KX8, 200ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28

PYA28C64X-20CWM Parametric

Parameter NameAttribute value
MakerPyramid Semiconductor Corporation
Parts packaging codeDIP
package instruction0.600 INCH, CERAMIC, DIP-28
Contacts28
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Maximum access time200 ns
JESD-30 codeR-CDIP-T28
memory density65536 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals28
word count8192 words
character code8000
Operating modeSYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize8KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Programming voltage5 V
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height5.8928 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width15.24 mm
Maximum write cycle time (tWC)1 ms

PYA28C64X-20CWM Preview

PYA28C64(X)
8K X 8 EEPROM
FEATURES
Access Times of 150, 200, 250 and 350ns
Single 5V±10% Power Supply
Fast Byte Write (200µs or 1 ms)
Low Power CMOS:
- 60 mA Active Current
- 150 µA Standby Current
Fast Write Cycle Time
RDY/BUSY pin is not connected for the
PYA28C64X
CMOS & TTL Compatible Inputs and Outputs
Endurance:
- 10,000 Write Cycles
- 100,000 Write Cycles (optional)
Data Retention: 10 Years
Available in the following package:
– 28-Pin 600 mil Ceramic DIP
– 32-Pin Ceramic LCC (450x550 mils)
DESCRIPTION
The PYA28C64 is a 5 Volt 8Kx8 EEPROM. The PYA28C64
features
DATA
and RDY/BUSY (PYA28C64 only) to indicate
early completion of a Write Cycle. Data Retention is 10
Years. The device is available in a 28-Pin 600 mil wide
Ceramic DIP and 32-Pin LCC.
PIN CONFIGURATIONS
DIP (C5-1)
FUNCTIONAL BLOCK DIAGRAM
LCC (L6)
NOTE: The RDY/BUSY pin is not connected for the PYA28C64X.
Document #
EEPROM105
REV B
Revised June 2012
PYA28C64 - 8K x 8 EEPROM
OPERATION
READ
Read operations are initiated by both
OE
and
CE
LOW.
The read operation is terminated by either
CE
or
OE
re-
turning HIGH. This two line control architecture elimi-
nates bus contention in a system environment. The data
bus will be in a high impedance state when either
OE
or
CE
is HIGH.
BYTE WRITE
Write operations are initiated when both
CE
and
WE
are
LOW and
OE
is HIGH. The PYA28C64 supports both a
CE
and
WE
controlled write cycle. That is, the address is
latched by the falling edge of either
CE
or
WE,
whichever
occurs last. Similarly, the data is latched internally by the
rising edge of either
CE
or
WE,
whichever occurs first. A
byte write operation, once initiated, will automatically con-
tinue to completion.
CHIP CLEAR
The contents of the entire memory of the PYA28C64 may
be set to the high state by the CHIP CLEAR operation.
By setting
CE
low and
OE
to 12 volts, the chip is cleared
when a 10 msec low pulse is applied to
WE.
DEVICE IDENTIFICATION
An extra 32 bytes of EEPROM memory are available to
the user for device identification. By raising A
9
to 12 ±
0.5V and using address locations 1FE0H to 1FFFH the
additional bytes may be written to or read from in the
same manner as the regular memory array.
DATA
POLLING
The PYA28C64 features
DATA
Polling as a method to in-
dicate to the host system that the byte write cycle has
completed.
DATA
Polling allows a simple bit test opera-
tion to determine the status of the PYA28C64, eliminat-
ing additional interrupts or external hardware. During the
internal programming cycle, any attempt to read the last
byte written will produce the complement of that data on
I/O
7
(i.e., write data=0xxx xxxx, read data=1xxx xxxx).
Once the programming cycle is complete, I/O
7
will reflect
true data.
READY/BUSY
Pin 1 is an open drain RDY/BUSY output that can be
used to detect the end of a write cycle. RDY/BUSY is
actively pulled low during the write cycle and is released
at the completion of the write. The open drain connec-
tion allows for OR-tying of several devices to the same
RDY/BUSY line. The RDY/BUSY pin is not connected
for the PYA28C64X.
MAXIMUM RATINGS
(1)
Sym
V
CC
V
TERM
T
A
T
BIAS
T
STG
P
T
I
OUT
Parameter
Power Supply Pin with
Respect to GND
Terminal Voltage with
Respect to GND (up to
6.25V)
Operating Temperature
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Value
-0.3 to +6.25
-0.5 to +6.25
-55 to +125
-55 to +125
-65 to +150
1.0
50
Unit
V
V
°C
°C
°C
W
mA
RECOMMENDED OPERATING CONDITIONS
Grade
(2)
Military
Ambient Temp
-55°C to +125°C
GND
0V
V
CC
5.0V ± 10%
CAPACITANCES
(4)
Sym
C
IN
C
OUT
Parameter
(V
CC
= 5.0V, T
A
= 25°C, f = 1.0MHz)
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
10
10
Unit
pF
pF
Input Capacitance
Output Capacitance
Document #
EEPROM105
REV B
Page 2
PYA28C64 - 8K x 8 EEPROM
DC ELECTRICAL CHARACTERISTICS
Sym Parameter
V
IH
V
IL
V
HC
V
LC
V
OL
V
OH
I
LI
I
LO
I
SB
Input High Voltage
Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
Output Low Voltage (TTL Load)
Output High Voltage (TTL Load)
Input Leakage Current
Output Leakage Current
(Over Recommended Operating Temperature & Supply Voltage)
(2)
Test Conditions
PYA28C64
Min
2.0
-0.5
(3)
V
CC
- 0.2
-0.5
(3)
I
OL
= +2.1 mA, V
CC
= Min
I
OH
= -0.4 mA, V
CC
= Min
V
CC
= Max
V
IN
= GND to V
CC
V
CC
= Max,
CE
= V
IH
,
V
OUT
= GND to V
CC
CE
≥ V
IH
,
OE
= V
IL
,
Standby Power Supply Current (TTL Input Levels)
V
CC
= Max,
f = Max, Outputs Open
CE
≥ V
HC
,
I
SB1
Standby Power Supply Current (CMOS Input Levels)
V
CC
= Max,
f = 0, Outputs Open,
V
IN
≤ V
LC
or V
IN
≥ V
HC
CE
=
OE
= V
IL
,
I
CC
Supply Current
WE
= V
IH
,
All I/O's = Open,
Inputs = V
CC
= 5.5V
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with V
IL
and I
IL
not more negative than -3.0V and -100mA,
respectively, are permissible for pulse widths up to 20ns.
4. This parameter is sampled and not 100% tested.
—
—
—
Max
V
CC
+ 0.3
0.8
V
CC
+ 0.5
0.2
0.45
Unit
V
V
V
V
V
V
2.4
-10
-10
+10
+10
µA
µA
5
mA
150
µA
60
mA
Document #
EEPROM105
REV B
Page 3
PYA28C64 - 8K x 8 EEPROM
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym
t
AVAV
t
AVQV
t
ELQV
t
OLQV
t
ELQX
t
EHQZ
t
OLQX
t
OHQZ
t
AVQX
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Chip Disable to to Output in High Z
Output Enable to Output in Low Z
Output Disable to Output in High Z
Output Hold from Address Change
0
0
55
0
0
55
0
60
0
-150
Min
150
150
150
80
0
60
0
65
0
Max
Min
200
200
200
100
0
65
0
70
-200
Max
Min
250
250
250
100
0
70
-250
Max
Min
350
350
350
100
-350
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING WAVEFORM OF READ CYCLE
Document #
EEPROM105
REV B
Page 4
PYA28C64 - 8K x 8 EEPROM
AC CHARACTERISTICS—WRITE CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Symbol
t
ELRH
t
WLRH
t
AVEL
t
AVWL
t
ELAX
t
WLAX
t
WLEL
t
WHEH
t
OHEL
t
OHWL
t
WHOL
t
EHOL2
t
ELEH
t
WLWH
t
DVEH
t
DVWH
t
EHDX
t
WHDX
t
ELWL
t
EHWH
t
EHRL
t
WHRL
Parameter
Write Cycle Time
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
OE
Setup Time
OE
Hold Time
WE
Pulse Width
Data Setup Time
Data Hold Time
CE
Setup Time
CE
Hold Time
Time to device busy
10
50
0
0
10
10
100
50
10
0
0
50
1000
150 / 200 / 250 / 350
Min
Max
1
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Document #
EEPROM105
REV B
Page 5
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

PYA28C64X-20CWM Related Products

PYA28C64X-20CWM PYA28C64-35CWM PYA28C64E-35CWMB PYA28C64-20LM
Description EEPROM, 8KX8, 200ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28 EEPROM, 8KX8, 350ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28 EEPROM, 8KX8, 350ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28 EEPROM, 8KX8, 200ns, Parallel, CMOS, CQCC32, 0.450 X 0.550 INCH, CERAMIC, LCC-32
Maker Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation Pyramid Semiconductor Corporation
Parts packaging code DIP DIP DIP QFJ
package instruction 0.600 INCH, CERAMIC, DIP-28 0.600 INCH, CERAMIC, DIP-28 0.600 INCH, CERAMIC, DIP-28 0.450 X 0.550 INCH, CERAMIC, LCC-32
Contacts 28 28 28 32
Reach Compliance Code compliant compliant compliant compli
ECCN code 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C
Maximum access time 200 ns 350 ns 350 ns 200 ns
JESD-30 code R-CDIP-T28 R-CDIP-T28 R-CDIP-T28 R-CQCC-N32
memory density 65536 bit 65536 bit 65536 bit 65536 bi
Memory IC Type EEPROM EEPROM EEPROM EEPROM
memory width 8 8 8 8
Number of functions 1 1 1 1
Number of terminals 28 28 28 32
word count 8192 words 8192 words 8192 words 8192 words
character code 8000 8000 8000 8000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C
organize 8KX8 8KX8 8KX8 8KX8
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP DIP DIP QCCN
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE IN-LINE CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL
Programming voltage 5 V 5 V 5 V 5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Filter level MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883
Maximum seat height 5.8928 mm 5.8928 mm 5.8928 mm 1.905 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount NO NO NO YES
technology CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE NO LEAD
Terminal pitch 2.54 mm 2.54 mm 2.54 mm 1.27 mm
Terminal location DUAL DUAL DUAL QUAD
width 15.24 mm 15.24 mm 15.24 mm 11.43 mm
Maximum write cycle time (tWC) 1 ms 1 ms 1 ms 1 ms

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