PYA28C64E-35CWMB datasheet, PDF

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PYA28C64E-35CWMB: DescriptionEEPROM, 8KX8, 350ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28; Categorystorage storage; File Size670KB，10 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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PYA28C64E-35CWMB Overview

EEPROM, 8KX8, 350ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28

PYA28C64E-35CWMB Parametric

Parameter Name	Attribute value
Maker	Pyramid Semiconductor Corporation
Parts packaging code	DIP
package instruction	0.600 INCH, CERAMIC, DIP-28
Contacts	28
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Maximum access time	350 ns
JESD-30 code	R-CDIP-T28
memory density	65536 bit
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	28
word count	8192 words
character code	8000
Operating mode	SYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	8KX8
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Programming voltage	5 V
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	5.8928 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm
Maximum write cycle time (tWC)	1 ms

PYA28C64E-35CWMB Preview

PYA28C64(X)

8K X 8 EEPROM

FEATURES

Access Times of 150, 200, 250 and 350ns

Single 5V±10% Power Supply

Fast Byte Write (200µs or 1 ms)

Low Power CMOS:

- 60 mA Active Current

- 150 µA Standby Current

Fast Write Cycle Time

RDY/BUSY pin is not connected for the

PYA28C64X

CMOS & TTL Compatible Inputs and Outputs

Endurance:

- 10,000 Write Cycles

- 100,000 Write Cycles (optional)

Data Retention: 10 Years

Available in the following package:

– 28-Pin 600 mil Ceramic DIP

– 32-Pin Ceramic LCC (450x550 mils)

DESCRIPTION

The PYA28C64 is a 5 Volt 8Kx8 EEPROM. The PYA28C64

features

DATA

and RDY/BUSY (PYA28C64 only) to indicate

early completion of a Write Cycle. Data Retention is 10

Years. The device is available in a 28-Pin 600 mil wide

Ceramic DIP and 32-Pin LCC.

PIN CONFIGURATIONS

DIP (C5-1)

FUNCTIONAL BLOCK DIAGRAM

LCC (L6)

NOTE: The RDY/BUSY pin is not connected for the PYA28C64X.

Document #

EEPROM105

REV B

Revised June 2012

PYA28C64 - 8K x 8 EEPROM

OPERATION

READ

Read operations are initiated by both

and

LOW.

The read operation is terminated by either

re-

turning HIGH. This two line control architecture elimi-

nates bus contention in a system environment. The data

bus will be in a high impedance state when either

is HIGH.

BYTE WRITE

Write operations are initiated when both

and

are

LOW and

is HIGH. The PYA28C64 supports both a

and

controlled write cycle. That is, the address is

latched by the falling edge of either

WE,

whichever

occurs last. Similarly, the data is latched internally by the

rising edge of either

WE,

whichever occurs first. A

byte write operation, once initiated, will automatically con-

tinue to completion.

CHIP CLEAR

The contents of the entire memory of the PYA28C64 may

be set to the high state by the CHIP CLEAR operation.

By setting

low and

to 12 volts, the chip is cleared

when a 10 msec low pulse is applied to

WE.

DEVICE IDENTIFICATION

An extra 32 bytes of EEPROM memory are available to

the user for device identification. By raising A

to 12 ±

0.5V and using address locations 1FE0H to 1FFFH the

additional bytes may be written to or read from in the

same manner as the regular memory array.

DATA

POLLING

The PYA28C64 features

DATA

Polling as a method to in-

dicate to the host system that the byte write cycle has

completed.

DATA

Polling allows a simple bit test opera-

tion to determine the status of the PYA28C64, eliminat-

ing additional interrupts or external hardware. During the

internal programming cycle, any attempt to read the last

byte written will produce the complement of that data on

I/O

(i.e., write data=0xxx xxxx, read data=1xxx xxxx).

Once the programming cycle is complete, I/O

will reflect

true data.

READY/BUSY

Pin 1 is an open drain RDY/BUSY output that can be

used to detect the end of a write cycle. RDY/BUSY is

actively pulled low during the write cycle and is released

at the completion of the write. The open drain connec-

tion allows for OR-tying of several devices to the same

RDY/BUSY line. The RDY/BUSY pin is not connected

for the PYA28C64X.

MAXIMUM RATINGS

(1)

Sym

TERM

BIAS

STG

OUT

Parameter

Power Supply Pin with

Respect to GND

Terminal Voltage with

Respect to GND (up to

6.25V)

Operating Temperature

Temperature Under Bias

Storage Temperature

Power Dissipation

DC Output Current

Value

-0.3 to +6.25

-0.5 to +6.25

-55 to +125

-65 to +150

1.0

Unit

°C

RECOMMENDED OPERATING CONDITIONS

Grade

(2)

Military

Ambient Temp

-55°C to +125°C

GND

5.0V ± 10%

CAPACITANCES

(4)

Sym

OUT

Parameter

= 5.0V, T

= 25°C, f = 1.0MHz)

Conditions

= 0V

OUT

= 0V

Typ

Unit

Input Capacitance

Output Capacitance

Document #

EEPROM105

REV B

Page 2

PYA28C64 - 8K x 8 EEPROM

DC ELECTRICAL CHARACTERISTICS

Sym Parameter

Input High Voltage

Input Low Voltage

CMOS Input High Voltage

CMOS Input Low Voltage

Output Low Voltage (TTL Load)

Output High Voltage (TTL Load)

Input Leakage Current

Output Leakage Current

(Over Recommended Operating Temperature & Supply Voltage)

(2)

Test Conditions

PYA28C64

Min

2.0

-0.5

(3)

- 0.2

-0.5

(3)

= +2.1 mA, V

= Min

= -0.4 mA, V

= Min

= Max

= GND to V

= Max,

= V

OUT

= GND to V

≥ V

= V

Standby Power Supply Current (TTL Input Levels)

= Max,

f = Max, Outputs Open

≥ V

SB1

Standby Power Supply Current (CMOS Input Levels)

= Max,

f = 0, Outputs Open,

≤ V

or V

≥ V

= V

Supply Current

= V

All I/O's = Open,

Inputs = V

= 5.5V

Notes:

1. Stresses greater than those listed under MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only

and functional operation of the device at these or any other conditions

above those indicated in the operational sections of this specification

is not implied. Exposure to MAXIMUM rating conditions for extended

periods may affect reliability.

2. Extended temperature operation guaranteed with 400 linear feet per

minute of air flow.

3. Transient inputs with V

and I

not more negative than -3.0V and -100mA,

respectively, are permissible for pulse widths up to 20ns.

4. This parameter is sampled and not 100% tested.

—

Max

+ 0.3

0.8

+ 0.5

0.2

0.45

Unit

2.4

-10

+10

µA

150

µA

Document #

EEPROM105

REV B

Page 3

PYA28C64 - 8K x 8 EEPROM

AC ELECTRICAL CHARACTERISTICS—READ CYCLE

= 5V ± 10%, All Temperature Ranges)

(2)

Sym

AVAV

AVQV

ELQV

OLQV

ELQX

EHQZ

OLQX

OHQZ

AVQX

Parameter

Read Cycle Time

Address Access Time

Chip Enable Access Time

Output Enable Access Time

Chip Enable to Output in Low Z

Chip Disable to to Output in High Z

Output Enable to Output in Low Z

Output Disable to Output in High Z

Output Hold from Address Change

-150

Min

150

Max

Min

200

100

-200

Max

Min

250

100

-250

Max

Min

350

100

-350

Max

Unit

TIMING WAVEFORM OF READ CYCLE

Document #

EEPROM105

REV B

Page 4

PYA28C64 - 8K x 8 EEPROM

AC CHARACTERISTICS—WRITE CYCLE

= 5V ± 10%, All Temperature Ranges)

(2)

Symbol

ELRH

WLRH

AVEL

AVWL

ELAX

WLAX

WLEL

WHEH

OHEL

OHWL

WHOL

EHOL2

ELEH

WLWH

DVEH

DVWH

EHDX

WHDX

ELWL

EHWH

EHRL

WHRL

Parameter

Write Cycle Time

Address Setup Time

Address Hold Time

Write Setup Time

Write Hold Time

Setup Time

Hold Time

Pulse Width

Data Setup Time

Data Hold Time

Setup Time

Hold Time

Time to device busy

100

1000

150 / 200 / 250 / 350

Min

Max

Unit

Document #

EEPROM105

REV B

Page 5

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PYA28C64E-35CWMB Related Products

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Description	EEPROM, 8KX8, 350ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28	EEPROM, 8KX8, 200ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28	EEPROM, 8KX8, 350ns, Parallel, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28	EEPROM, 8KX8, 200ns, Parallel, CMOS, CQCC32, 0.450 X 0.550 INCH, CERAMIC, LCC-32
Maker	Pyramid Semiconductor Corporation	Pyramid Semiconductor Corporation	Pyramid Semiconductor Corporation	Pyramid Semiconductor Corporation
Parts packaging code	DIP	DIP	DIP	QFJ
package instruction	0.600 INCH, CERAMIC, DIP-28	0.600 INCH, CERAMIC, DIP-28	0.600 INCH, CERAMIC, DIP-28	0.450 X 0.550 INCH, CERAMIC, LCC-32
Contacts	28	28	28	32
Reach Compliance Code	compliant	compliant	compliant	compli
ECCN code	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
Maximum access time	350 ns	200 ns	350 ns	200 ns
JESD-30 code	R-CDIP-T28	R-CDIP-T28	R-CDIP-T28	R-CQCC-N32
memory density	65536 bit	65536 bit	65536 bit	65536 bi
Memory IC Type	EEPROM	EEPROM	EEPROM	EEPROM
memory width	8	8	8	8
Number of functions	1	1	1	1
Number of terminals	28	28	28	32
word count	8192 words	8192 words	8192 words	8192 words
character code	8000	8000	8000	8000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C
organize	8KX8	8KX8	8KX8	8KX8
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	DIP	DIP	QCCN
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	CHIP CARRIER
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Programming voltage	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Filter level	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883
Maximum seat height	5.8928 mm	5.8928 mm	5.8928 mm	1.905 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	NO LEAD
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	QUAD
width	15.24 mm	15.24 mm	15.24 mm	11.43 mm
Maximum write cycle time (tWC)	1 ms	1 ms	1 ms	1 ms

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