inputs, A(14:0); and eight bidirectional data lines, DQ(7:0). E1
and E2 are device enable inputs that control device selection,
active, and standby modes. Asserting both E1 and E2 enables
the device, causes I
DD
to rise to its active value, and decodes the
15 address inputs to select one of 32,768 words in the memory.
W controls read and write operations. During a read cycle, G
must be asserted to enable the outputs.
Table 1. Device Operation Truth Table
G
W
X
X
0
1
1
E1
X
1
0
0
0
E2
3
0
X
1
1
1
I/O Mode
3-state
3-state
Data in
3-state
Data out
Mode
Standby
Standby
Write
Read
2
Read
Figure 2a. SRAM Pinout (36)
X
1
X
X
1
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
W
A13
A8
A9
A11
G
A10
E1
DQ7
DQ6
DQ5
DQ4
DQ3
0
Notes:
1. “X” is defined as a “don’t care” condition.
2. Device active; outputs disabled.
3. Tied active (i.e., logic 1) in the 28-pin DIP package.
READ CYCLE
A combination of W greater than V
IH
(min), E1 less than V
IL
(max), and E2 greater than V
IH
(min) defines a read cycle. Read
access time is measured from the latter of device enable, output
enable, or valid address to valid data output.
Read Cycle 1, the Address Access read in figure 3a, is initiated
by a change in address inputs while the chip is enabled with G
asserted and W deasserted. Valid data appears on data outputs
DQ(7:0) after the specified t
AVQV
is satisfied. Outputs remain
active throughout the entire cycle. As long as device enable and
output enable are active, the address inputs may change at a rate
equal to the minimum read cycle time (t
AVAV
).
Read Cycle 2, the Chip Enable-controlled Access in figure 3b,
is initiated by the latter of E1 and E2 going active while G
remains asserted, W remains deasserted, and the addresses
remain stable for the entire cycle. After the specified t
ETQV
is
satisfied, the eight-bit word addressed by A(14:0) is accessed
and appears at the data outputs DQ(7:0).
Read Cycle 3, the Output Enable-controlled Access in figure 3c,
is initiated by G going active while E1 and E2 are asserted, W
is deasserted, and the addresses are stable. Read access time is
t
GLQV
unless t
AVQV
or t
ETQV
have not been satisfied.
Figure 2b. SRAM Pinout (28)
PIN NAMES
A(14:0)
DQ(7:0)
E1
E2
1
Address
Data Input/Output
Enable 1
Enable 2
W
G
Write
Output Enable
V
DD
Power
V
SS
Ground
1. 36-lead flatpack only.
2
WRITE CYCLE
A combination of W less than V
IL
(max), E1 less than V
IL
(max),
and E2 greater than V
IH
(min) defines a write cycle. The state of
G is a “don’t care” for a write cycle. The outputs are placed in
the high-impedance state when either G is greater than
V
IH
(min), or when W is less than V
IL
(max).
Write Cycle 1, the Write Enable-controlled Access shown in
figure 4a, is defined by a write terminated by W going high, with
E1 and E2 still active. The write pulse width is defined by t
WLWH
when the write is initiated by W, and by t
ETWH
when the write
is initiated by the latter of E1 or E2. Unless the outputs have
been previously placed in the high-impedance state by G, the
user must wait t
WLQZ
before applying data to the eight
bidirectional pins DQ(7:0) to avoid bus contention.
Write Cycle 2, the Chip Enable-controlled Access shown in
figure 4b, is defined by a write terminated by the latter of E1 or
E2 going inactive. The write pulse width is defined by t
WLEF
when the write is initiated by W, and by t
ETEF
when the write
is initiated by the latter of E1 or E2 going active. For the W
initiated write, unless the outputs have been previously placed
in the high-impedance state by G, the user must wait t
WLQZ
before applying data to the eight bidirectional pins DQ(7:0) to
avoid bus contention.
RADIATION HARDNESS
The UT7156 SRAM incorporates special design and layout
features which allow operation in high-level radiation
environments.
Table 2. Radiation Hardness
Design Specifications
1
Total Dose
Error Rate
2
1.0E6
1.0E-10
rads(Si)
Errors/Bit-Day
Notes:
1. The SRAM will not latchup during radiation exposure under recommended
operating conditions.
2. 10% worst case particle environment, Geosynchronous orbit, 0.025 mils of
Aluminum.
3
ABSOLUTE MAXIMUM RATINGS
1
(Referenced to V
SS
)
SYMBOL
V
DD
V
I/O
T
STG
P
D
T
J
Θ
JC
I
I
PARAMETER
DC supply voltage
Voltage on any pin
Storage temperature
Maximum power dissipation
Maximum junction temperature
2
Thermal resistance, junction-to-case
3
DC input current
LIMITS
-0.5 to 7.0V
-0.5 to (V
DD
+ 0.3)V
-65 to +150°C
2.0W
+150°C
10°C/W
±
10 mA
Notes:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device
and
at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. E
xposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2. Maximum junction temperature may be increased to +175C during burn-in and steady-static life.
°
3. Test per MIL-STD-883, Method 1012.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
T
C
V
IN
PARAMETER
Positive supply voltage
Case temperature range
DC input voltage
LIMITS
4.5 to 5.5V
-55 to +125°C
0V to V
DD
4
DC ELECTRICAL CHARACTERISTICS (Pre/Post-Radiation)*
(V
DD
= 5.0V±10%) (-55°C to +125°C)
SYMBOL
V
IH
V
IL
V
OL
V
OH
V
OH
C
IN1
C
IO1
I
IN
I
OZ
PARAMETER
High-level input voltage
Low-level input voltage
Low-level output voltage
High-level output voltage
High-level output voltage
Input capacitance
Bidirectional I/O capacitance
Input leakage current
Three-state output leakage current
(CMOS)
(CMOS)
I
OL
= 200µA, V
DD
= 4.5V (CMOS)
I
OH
= -200µA, V
DD
= 4.5V (CMOS)
I
OH
= -4mA, V
DD
= 4.5V (CMOS)
ƒ
= 1MHz @ 0V
ƒ
= 1MHz @ 0V
V
IN
= V
DD
and V
SS
V
O
= V
DD
and V
SS
V
DD
= 5.5V
G = 5.5V
I
OS2, 3
Short-circuit output current
V
DD
= 5.5V, V
O
= V
DD
V
DD
= 5.5V, V
O
= 0V
I
DD
(OP)
Supply current operating @1MHz
CMOS inputs (I
OUT
= 0)
V
DD
= 5.5V
I
DD1
(OP)
I
DD3
(SB)
4
Supply current operating
@ 25MHz
Supply current standby
@ 0Hz
CMOS inputs (I
OUT
= 0)
V
DD
= 5.5V
CMOS inputs (I
OUT
= 0)
E1 = V
DD
- 0.5, V
DD
= 5.5V
1.2
mA
120
mA
50
-90
+90
mA
mA
mA
-5
-10
V
DD
-0.05
4.2
4
7
5
10
CONDITION
MIN
3.5
1.5
0.05
MAX
UNIT
V
V
V
V
V
pF
pF
µA
µA
Notes:
* Post-radiation performance guaranteed at 25C per MIL-STD-883 Method 1019 at 5.0E rads(Si).
°
5
1. Measured only for initial qualification and after process or design changes that could affect input/output capacitance.
2. Supplied as a design limit but not guaranteed or tested.
3. Not more than one output may be shorted at a time for maximum duration of one second.
Central topic: How to call dll under wince. Vs2005 makes a smart device DLL. After making it, copy the Lib file to the directory of the calling program project TestDll, put the DLL file (.lib and .dll...
On Wednesday, July 22, 2009, a total solar eclipse will occur in Asia and the Pacific. In about 5 hours, the eclipse belt will sweep across the Eastern Hemisphere. The shadow of the moon will first fa...
[i=s]This post was last edited by 574433742 on 2015-8-24 14:10[/i] [align=center][b] Sparks collide in communication, [/b][/align] [align=center][b] Ideas are generated in communication. [/b][/align] ...
I am a newcomer who is about to join this industry. It is said that bosses usually pay salaries in a secretive way. I want to know the future salary development of our industry. I hope everyone can po...
The DSP I use is 2407A. The program has been burned, but the CPLD gets very hot when powered on. When the AD part is connected, the DSP gets hot together. I checked the board and found no problem. Ple...
The TIA Portal software's shift instructions shift the contents of an accumulator bit by bit to the left or right. The number of bits shifted is determined by N. A left shift of N bits multiplies t...[Details]
The core of a machine vision system is image acquisition and processing. All information comes from images, and image quality is crucial to the entire vision system. A good image can improve the st...[Details]
Nios II is a configurable 16-/32-bit RISC processor. Combined with a rich set of peripheral-specific instructions and hardware acceleration units, it provides a highly flexible and powerful SOPC sy...[Details]
On August 25th, Apple's expansion in India encountered new troubles. According to Bloomberg, Foxconn Technology Group has recalled approximately 300 Chinese engineers from India, further hindering ...[Details]
One of the most core components of electric vehicles is the motor. The power supply provides electrical energy to the motor, which converts this electrical energy into mechanical energy, which in t...[Details]
Compared to cloud databases, minicomputers are purpose-built for decentralized, rugged computing at the edge of the network. By moving applications, analytics, and processing services closer to the...[Details]
On August 22, the Wall Street Journal reported on the 21st local time that the new US government does not plan to acquire equity in semiconductor wafer foundry giant TSMC and Micron, one of the thr...[Details]
On August 20, Geely announced its focus on "One Cockpit". Through a unified AI OS architecture, a unified AI Agent, and a unified user ID, it will achieve an All-in-One AI cockpit, create the first...[Details]
China, August 21, 2025 – STMicroelectronics (NYSE: STM), a world-leading semiconductor company serving a wide range of electronics applications, has published its IFRS 2025 semi-annual financial re...[Details]
MQTT Ethernet I/O modules primarily collect I/O port information and transmit data over the network. In addition to being a TCP server, Ethernet I/O modules can also function as TCP clients. Furthe...[Details]
Batteries, at the core of new energy vehicles, are crucial to vehicle performance and range. Existing automotive batteries are categorized into lead-acid and lithium batteries. Currently, new energ...[Details]
The driving mode is not unfamiliar to vehicles. According to the driving mode of the vehicle, there are front-wheel drive, rear-wheel drive and even four-wheel drive. Four-wheel drive is a major se...[Details]
For new energy vehicles, the importance of batteries is unquestionable. Not only does it determine the performance of the vehicle, but the battery density also has a great relationship with the veh...[Details]
introduction
The rapid adoption of computers has led to a growing number of tasks being performed on them. People from all walks of life, especially programmers and writers, are spending incre...[Details]
introduction
As core electronic components used in vastly different fields, automotive-grade chips and mobile/consumer-grade chips exhibit significant differences in their...[Details]
Embedded System
京公网安备 11010802033920号
EEWORLD
