EEWORLDEEWORLDEEWORLD

Part Number

Search

74ALVCH16373DL

Description
Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48
Categorylogic    logic   
File Size123KB,18 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
Download Datasheet Parametric Compare View All

74ALVCH16373DL Online Shopping

Suppliers Part Number Price MOQ In stock  
74ALVCH16373DL - - View Buy Now

74ALVCH16373DL Overview

Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48

74ALVCH16373DL Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNexperia
package instructionSSOP-48
Reach Compliance Codecompliant
Other featuresCAN ALSO OPERATES AT 2.3 TO 2.7 AND 3 TO 3.6 V RANGE
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G48
JESD-609 codee4
length15.875 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS DRIVER
Humidity sensitivity level1
Number of digits8
Number of functions2
Number of ports2
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)5.9 ns
Certification statusNot Qualified
Maximum seat height2.8 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.2 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.5 mm
74ALVCH16373
2.5 V/3.3 V 16-bit D-type transparent latch; 3-state
Rev. 6 — 10 July 2012
Product data sheet
1. General description
The 74ALVCH16373 is 16-bit D-type transparent latch featuring separate D-type inputs for
each latch and 3-state outputs for bus oriented applications.
Incorporates bus hold data inputs which eliminate the need for external pull-up or
pull-down resistors to hold unused inputs.
One latch enable (LE) input and one output enable (OE) are provided per 8-bit section.
The 74ALVCH16373 consists of 2 sections of eight D-type transparent latches with 3-state
true outputs. When LE is HIGH, data at the nDn inputs enter the latches. In this condition
the latches are transparent, therefore a latch output will change each time its
corresponding D-input changes.
When LE is LOW, the latches store the information that was present at the nDn inputs at a
set-up time preceding the LOW-to-HIGH transition of LE. When OE is LOW, the contents
of the eight latches are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
latches.
2. Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
Complies with JEDEC standard JESD8-B
CMOS low power consumption
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple V
CC
and GND pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold
Output drive capability 50
transmission lines at 85
C
Current drive
24
mA at V
CC
= 3.0 V

74ALVCH16373DL Related Products

74ALVCH16373DL
Description Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48
Is it Rohs certified? conform to
Maker Nexperia
package instruction SSOP-48
Reach Compliance Code compliant
Other features CAN ALSO OPERATES AT 2.3 TO 2.7 AND 3 TO 3.6 V RANGE
series ALVC/VCX/A
JESD-30 code R-PDSO-G48
JESD-609 code e4
length 15.875 mm
Load capacitance (CL) 50 pF
Logic integrated circuit type BUS DRIVER
Humidity sensitivity level 1
Number of digits 8
Number of functions 2
Number of ports 2
Number of terminals 48
Maximum operating temperature 85 °C
Minimum operating temperature -40 °C
Output characteristics 3-STATE
Output polarity TRUE
Package body material PLASTIC/EPOXY
encapsulated code SSOP
Package shape RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 260
propagation delay (tpd) 5.9 ns
Certification status Not Qualified
Maximum seat height 2.8 mm
Maximum supply voltage (Vsup) 3.6 V
Minimum supply voltage (Vsup) 1.2 V
Nominal supply voltage (Vsup) 2.5 V
surface mount YES
technology CMOS
Temperature level INDUSTRIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING
Terminal pitch 0.635 mm
Terminal location DUAL
Maximum time at peak reflow temperature 30
width 7.5 mm

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 380  715  1786  1393  697  8  15  36  29  45 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号