SyncMOS Technologies Inc.
May 2002
SM59264
8 - Bit Micro-controller
with 128KB flash & 1KB RAM embedded
Product List
SM59264C25, 25 MHz 128KB internal flash MCU
SM59264C40, 40 MHz 128KB internal flash MCU
Features
Working voltage:4.5V through 5.5V
General 8052 family compatible
12 clocks per machine cycle
64K byte on chip program flash with In-System
Programming (ISP) capability
64K byte on-chip data flash with ISP capability
1024 byte on-chip RAM
Three 16 bit Timers/Counters
One Watch Dog Timer
Four 8-bit I/O ports for PDIP package
Four 8-bit I/O ports + one 4-bit I/O ports for PLCC or QFP
package
Full duplex serial channel
Bit operation instruction
Page free jumps
8-bit Unsigned Division
8-bit Unsigned Multiply
BCD arithmetic
Direct Addressing
Indirect Addressing
Nested Interrupt
Two priority level interrupt
A serial I/O port
Power save modes: Idle mode and Power down mode
Code protection function
Low EMI (inhibit ALE)
Reset with address $0000 blank initiate ISP service program
ISP service program space configurable in N*512 byte
(N=0 to 8) size
Bank mapping direct addressing mode for access on-chip RAM
4 channel SPWM function
Description
The SM59264 series product is an 8 - bit single chip micro
controller with 128KB on-chip flash which including 64KB
program flash & 64KB data flash and 1K byte RAM
embedded. It has In-System Programming (ISP) function
and is a derivative of the 8052 micro controller family. It
has 4-channel SPWM build-in. User can access on-chip
expanded RAM with easier and faster way by its ‘bank
mapping direct addressing mode’ scheme. With its hard-
ware features and powerful instruction set, it’s straight for-
ward to make it a versatile and cost effective controller for
those applications which demand up to 32 I/O pins for
PDIP package or up to 36 I/O pins for PLCC/QFP pack-
age, or applications which need up to 64K byte flash mem-
ory for program and/or for data.
To program the on-chip flash memory, a commercial writer
is available to do it in parallel programming method. The
on-chip flash memory can be programmed in either paral-
lel or serial interface with its ISP feature.
Ordering Information
yywwv
SM59264ihhk
yy: year, ww:week
v: version identifier { , A, B, ...}
i: process identifier
hh: working clock in MHz {25, 40}
k: package type postfix {as below table}
Postfix
P
J
Q
Package
40L PDIP
44L PLCC
44L QFP
Pin/Pad
Configuration
page 2
page 2
page 2
Dimension
page 28
page 29
page 30
Taiwan
4F, No. 1 Creation Road 1,
Science-based Industrial Park,
Hsinchu, Taiwan 30077
TEL: 886-3-578-3344
886-3-579-2988
FAX: 886-3-579-2960
886-3-578-0493
Web site: http://www.syncmos.com.tw
Specifications subject to change without notice,contact your sales representatives for the most recent information.
1/32
Ver 1.0
PID 59264 05/02
SyncMOS Technologies Inc.
May 2002
SM59264
Pin Configurations
P1.4/SPWM2
P1.3/SPWM1
P1.2/SPWM0
P1.2/SPWM0
P1.3/SPWM1
P1.4/SPWM2
P1.1/T2EX
P1.0/T2
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P1.1/T2EX
P1.0/T2
P4.2
VDD
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P4.2
6
5
4
3
2
1 44 43 42 41 40
SPWM3/P1.5
P1.6
P1.7
RES
RXD/P3.0
P4.3
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
7
8
9
10
11
12
13
39
38
37
36
35
34
33
32
31
30
29
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
#EA
P4.1
ALE
#PSEN
P2.7/A15
P2.6/A14
P2.5/A13
SPWM3/P1.5
P1.6
P1.7
RES
RXD/P3.0
P4.3
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
1
2
3
4
5
6
7
8
9
10
11
44 43 42 41 40 39 38 37 36 35 34
33
32
31
30
29
28
27
26
25
24
23
12 13 14 15 16 17 18 19 20 21 22
VDD
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
#EA
P4.1
ALE
#PSEN
P2.7/A15
P2.6/A14
P2.5/A13
SM59264
ihhJ
44L PLCC
SM59264
ihhQ
44L QFP
(Top View)
14
(Top View)
15
16
17
18 19 20 21 22 23 24 25 26 27 28
#WR/P3.6
#RD/P3.7
XTAL2
XTAL1
VSS
P2.2/A10
P2.3/A11
P2.4/A12
P2.0/A8
P2.1/A9
P4.0
#WR/P3.6
#RD/P3.7
XTAL2
XTAL1
P2.2/A10
T2/P1.0
T2EX/P1.1
SPWM0/P1.2
SPWM1/P1.3
SPWM2/P1.4
SPWM3/P1.5
P1.6
P1.7
RES
RXD/P3.0
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
#WR/P3.6
#RD/P3.7
XTAL2
XTAL1
VSS
1
2
3
4
5
6
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VDD
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
#EA
ALE
#PSEN
P2.7/A15
P2.6/A14
P2.5/A13
P2.4/A12
P2.3/A11
P2.2/A10
P2.1/A9
P2.0/A8
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Specifications subject to change without notice,contact your sales representatives for the most recent information.
2/32
Ver 1.0
PID 59264 05/02
P2.4/A12
P2.3/A11
P2.0/A8
P2.1/A9
VSS
P4.0
SM59264 ihhP
40L PDIP
(Top View)
SyncMOS Technologies Inc.
May 2002
Block Diagram
Timer 2
Timer 1
Timer 0
Stack
Pointer
Decoder &
Register
1024 bytes
RAM
SM59264
WDT
RES
Reset
Circuit
to pertinent blocks
Acc
to whole chip
Buffer2
Buffer1
Buffer
DPTR
Vdd
Vss
Power
Circuit
PC
Incrementer
Interrupt
Circuit
to pertinent blocks
ALU
Program
Counter
XTAL2
XTAL1
#EA
ALE
#PSEN
Timing
Generator
to whole system
PSW
Register
Instruction
Register
1FFFFH
64KB
data flash
Port 0
Latch
SPWM
Port 1
Latch
Port 2
Latch
Port 3
Latch
Port 4
Latch
ISP
64KB
program
flash
10000H
4
2
0000H
Port 0
Driver & Mux
8
Port 1
Driver & Mux
8
Port 2
Driver & Mux
8
Port 3
Driver & Mux
8
Port 4
Driver & Mux
4
Specifications subject to change without notice,contact your sales representatives for the most recent information.
3/32
Ver 1.0
PID 59264 05/02
SyncMOS Technologies Inc.
May 2002
SM59264
Pin Descriptions
40L 44L 44L
PDIP QFP PLCC
Pin# Pin# Pin#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
40
41
42
43
44
1
2
3
4
5
7
8
9
10
11
12
13
14
15
16
18
19
20
21
22
23
24
25
26
27
29
30
31
32
33
34
35
36
37
38
17
28
39
6
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
40
41
42
43
44
23
34
1
12
Symbol
T2/P1.0
T2EX/P1.1
SPWM0/P1.2
SPWM1/P1.3
SPWM2/P1.4
SPWM3/P1.5
P1.6
P1.7
RES
RXD/P3.0
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
#WR/P3.6
#RD/P3.7
XTAL2
XTAL1
VSS
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
#PSEN
ALE
#EA
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VDD
P4.0
P4.1
P4.2
P4.3
Active I/O
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
o
o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
Names
timer 2 clock out & bit 0 of port 1
timer 2 control & bit 1 of port 1
SPWM channel 0, bit 2 of port 1
SPWM channel 1, bit 3 of port 1
SPWM channel 2, bit 4 of port 1
SPWM channel 3, bit 5 of port 1
bit 6 of port 1
bit 7 of port 1
Reset
Receive data & bit 0 of port 3
Transmit data & bit 1 of port 3
low true interrupt 0 & bit 2 of port 3
low true interrupt 1 & bit 3 of port 3
Timer 0 & bit 4 of port 3
Timer 1 & bit 5 of port 3
ext. memory write & bit 6 of port 3
ext. mem. read & bit 7 of port 3
Crystal out
Crystal in
Sink Voltage, Ground
bit 0 of port 2 & bit 8 of ext. memory address
bit 1 of port 2 & bit 9 of ext. memory address
bit 2 of port 2 & bit 10 of ext. memory address
bit 3 of port 2 & bit 11 of ext. memory address
bit 4 of port 2 & bit 12 of ext. memory address
bit 5 of port 2 & bit 13 of ext. memory address
bit 6 of port 2 & bit 14 of ext. memory address
bit 7 of port 2 & bit 15 of ext. memory address
program storage enable
address latch enable
external access & VPP
bit 7 of port 0 & data/address bit 7 of ext. memory
bit 6 of port 0 & data/address bit 6 of ext. memory
bit 5 of port 0 & data/address bit 5 of ext. memory
bit 4 of port 0 & data/address bit 4 of ext. memory
bit 3 of port 0 & data/address bit 3 of ext. memory
bit 2 of port 0 & data/address bit 2 of ext. memory
bit 1 of port 0 & data/address bit 1 of ext. memory
bit 0 of port 0 & data/address bit 0 of ext. memory
Drive Voltage, +5 Vcc
bit 0 of Port 4
bit 1 of Port 4
bit 2 of Port 4
bit 3 of Port 4
H
L/ -
L/ -
L
Specifications subject to change without notice,contact your sales representatives for the most recent information.
4/32
Ver 1.0
PID 59264 05/02
SyncMOS Technologies Inc.
May 2002
Special Function Register (SFR)
The address $80 to $FF can be accessed by direct addressing mode only.
Address $80 to $FF is SFR area.
The following table lists the SFRs which are identical to general 8052, as well as SM59264 Extension SFRs.
SM59264
Special Function Register (SFR) Memory Map
$F8
$F0
$E8
$E0
$D8
$D0
$C8
$C0
$B8
$B0
$A8
$A0
$98
$90
$88
$80
ACC
P4
PSW
T2CON
IP
P3
IE
P2
SCON
P1
TCON
P0
TMOD
SP
TL0
DPL
TL1
DPH
TH0
(Reserved)
TH1
RCON
DBANK
PCON
SBUF
SPWMC
P1CON
SPWMD0
SPWMD1
SPWMD2
SPWMD3
WDTC
WDTKEY
T2MOD
RCAP2L
RCAP2H
TL2
TH2
SCONF
B
ISPFAH
ISPFAL
ISPFD
ISPC
$FF
$F7
$EF
$E7
$DF
$D7
$CF
$C7
$BF
$B7
$AF
$A7
$9F
$97
$8F
$87
Note: The text of SFRs with bold type characters are Extension Special Function Registers for SM59264
Addr
85H
86H
97H
9BH
9FH
A3H
A4H
A5H
A6H
A7H
BFH
C8H
C9H
D8H
SFR
RCON
DBANK
WDTKEY
P1CON
WDTC
SPWMC
SPWMD0
SPWMD1
SPWMD2
SPWMD3
SCONF
T2CON
T2MOD
P4
Reset
00H
0***0001
********
**0000**
0*0**000
******00
00H
00H
00H
00H
0***_0000
00H
******00
****1111
SPWMD04 SPWMD03 SPWMD02 SPWMD01 SPWMD00
SPWMD14 SPWMD13 SPWMD12 SPWMD11 SPWMD10
SPWMD24 SPWMD23 SPWMD22 SPWMD21 SPWMD20
SPWMD34 SPWMD33 SPWMD32 SPWMD31 SPWMD30
WDR
TF2
*
EXF2
*
RCLK
*
TCLK
*
DFEN
EXEN2
*
P4.3
BRM02
BRM12
BRM22
BRM32
ISPE
TR2
*
P4.2
WDTE
7
RAMS7
BSE
SPWME3
CLEAR
SPWME2
6
RAMS6
5
RAMS5
4
RAMS4
3
RAMS3
BS3
SPWME1
2
RAMS2
BS2
SPWME0
PS2
PS1
SPFS1
BRM01
BRM11
BRM21
BRM31
OME
C/T2
T2OE
P4.1
PS0
SPFS0
BRM00
BRM10
BRM20
BRM30
ALEI
CP/RL2
DCEN
P4.0
1
RAMS1
BS1
0
RAMS0
BS0
WDTKEY7 WDTKEY6 WDTKEY5 WDTKEY4 WDTKEY3 WDTKEY2 WDTKEY1 WDTKEY0
Specifications subject to change without notice,contact your sales representatives for the most recent information.
5/32
Ver 1.0
PID 59264 05/02
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