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74ABT853PWDH-T

Description
IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver
Categorylogic    logic   
File Size59KB,7 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

74ABT853PWDH-T Overview

IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver

74ABT853PWDH-T Parametric

Parameter NameAttribute value
MakerNXP
package instructionTSSOP,
Reach Compliance Codeunknown
Other featuresWITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION
seriesABT
JESD-30 codeR-PDSO-G24
length7.8 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS TRANSCEIVER
Number of digits8
Number of functions2
Number of ports2
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Maximum supply current (ICC)38 mA
propagation delay (tpd)4.5 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyBICMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width4.4 mm
Philips Semiconductors
Product specification
8-bit transceiver with 9-bit parity checker/
generator and flag latch (3-State)
74ABT853
FEATURES
Low static and dynamic power dissipation with high speed and
high output drive
The 74ABT853 is an octal transceiver with a parity
generator/checker and is intended for bus–oriented applications.
When Output Enable A (OEA) is High, it will place the A outputs in a
high impedance state. Output Enable B (OEB) controls the B
outputs in the same way.
The parity generator creates an odd parity output (PARITY) when
OEB is Low. When OEA is Low, the parity of the B port, including
the PARITY input, is checked for odd parity. When an error is
detected, the error data is sent to the input of a latch. The error data
can then be passed, stored, cleared, or sampled depending on the
ENABLE and CLEAR control signals.
If both OEA and OEB are Low, data will flow from the A bus to the B
bus and the part is forced into an error condition which creates an
inverted PARITY output. This error condition can be used by the
designer for system diagnostics.
Open-collector ERROR output
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Power-up 3-State
Live insertion/extraction permitted
DESCRIPTION
The 74ABT853 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
PARAMETER
Propagation delay
An to Bn or Bn to An
Propagation delay
An to PARITY
Input capacitance
I/O capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 5V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled; V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
TYPICAL
3.4
7.4
4
7
50
UNIT
ns
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT853 N
74ABT853 D
74ABT853 DB
74ABT853 PW
NORTH AMERICA
74ABT853 N
74ABT853 D
74ABT853 DB
74ABT853PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
LOGIC SYMBOL
OEA
1
24 V
CC
23 B0
22 B1
2
3
4
5
6
7
8
9
21 B2
20 B3
19 B4
18 B5
17 B6
16 B7
15 PARITY
14 OEB
13 ENABLE
TOP VIEW
23
22
21
20
19
18
17
16
14
1
11
13
A0 A1 A2 A3 A4 A5 A6 A7
OEB
OEA
CLEAR
ENABLE
B0 B1 B2 B3 B4 B5 B6 B7
PARITY
ERROR
15
10
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
ERROR 10
CLEAR 11
GND 12
SA00262
SA00263
1995 Sep 06
1
853-1672 15702

74ABT853PWDH-T Related Products

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Description IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, TSSOP-24, Bus Driver/Transceiver IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SSOP-24, Bus Driver/Transceiver IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SSOP-24, Bus Driver/Transceiver ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24 ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24 IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDIP24, PLASTIC, DIP-24, Bus Driver/Transceiver IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, TSSOP-24, Bus Driver/Transceiver IC ABT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, TSSOP-24, Bus Driver/Transceiver
Maker NXP NXP NXP NXP NXP NXP NXP NXP NXP
package instruction TSSOP, TSSOP, SSOP, SSOP, SOP, SOP, DIP, TSSOP, TSSOP,
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknown unknown
Other features WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; PARITY GENERATION/ERROR DETECTION
series ABT ABT ABT ABT ABT ABT ABT ABT ABT
JESD-30 code R-PDSO-G24 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24 R-PDIP-T24 R-PDSO-G24 R-PDSO-G24
length 7.8 mm 7.8 mm 8.2 mm 8.2 mm 15.4 mm 15.4 mm 31.7 mm 7.8 mm 7.8 mm
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER
Number of digits 8 8 8 8 8 8 8 8 8
Number of functions 2 2 2 2 1 1 1 2 2
Number of ports 2 2 2 2 2 2 2 2 2
Number of terminals 24 24 24 24 24 24 24 24 24
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP SSOP SSOP SOP SOP DIP TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE IN-LINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Maximum supply current (ICC) 38 mA 38 mA 38 mA 38 mA 38 mA 38 mA 38 mA 38 mA 38 mA
propagation delay (tpd) 4.5 ns 4.5 ns 4.5 ns 4.5 ns 4.5 ns 4.5 ns 4.5 ns 4.5 ns 4.5 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.1 mm 1.1 mm 2 mm 2 mm 2.65 mm 2.65 mm 4.7 mm 1.1 mm 1.1 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES NO YES YES
technology BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING THROUGH-HOLE GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.65 mm 0.65 mm 1.27 mm 1.27 mm 2.54 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
width 4.4 mm 4.4 mm 5.3 mm 5.3 mm 7.5 mm 7.5 mm 7.62 mm 4.4 mm 4.4 mm
Parts packaging code - TSSOP SSOP SSOP SOIC SOIC DIP TSSOP TSSOP
Contacts - 24 24 24 24 24 24 24 24
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