XC9536-15VQG44Q datasheet, PDF

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XC9536-15VQG44Q: DescriptionFlash PLD, CMOS, PQFP44, VQFP-44; CategoryProgrammable logic devices Programmable logic; File Size55KB，3 Pages; ManufacturerXILINX; Websitehttps://www.xilinx.com/; Environmental Compliance

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XC9536-15VQG44Q Overview

Flash PLD, CMOS, PQFP44, VQFP-44

XC9536-15VQG44Q Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	XILINX
Parts packaging code	QFP
package instruction	TQFP,
Contacts	44
Reach Compliance Code	compliant
JESD-30 code	S-PQFP-G44
JESD-609 code	e3
length	10 mm
Humidity sensitivity level	3
Number of I/O lines	34
Number of terminals	44
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
organize	34 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	TQFP
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Programmable logic type	FLASH PLD
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	10 mm

XC9536-15VQG44Q Preview

XC9500 In-System Programmable

CPLD Automotive IQ Family

DS120-1 (v1.2) October 18, 2004

Product Specification

As shown in

Table 1,

logic density of the XC9500 devices

ranges from 800 to 1,600 usable gates with 36 and 72 reg-

isters, respectively. Multiple package options and associ-

ated I/O capacity are shown in

Table 2.

The XC9500 family

is fully pin-compatible allowing easy design migration

across multiple density options in a given package footprint.

The XC9500 architectural features address the require-

ments of in-system programmability. Enhanced pin-locking

capability avoids costly board rework. An expanded JTAG

instruction set allows version control of programming pat-

terns and in-system debugging. In-system programming

throughout the full device operating range and a minimum

of 10,000 program/erase cycles provide worry-free recon-

figurations and system field upgrades.

Advanced system features include output slew rate control

and user-programmable ground pins to help reduce system

noise. I/Os may be configured for 3.3V or 5V operation. All

outputs provide 24 mA drive.

Features

•

System frequency up to 55 MHz

Guaranteed to meet full electrical specifications over T

= –40 to +125°C

5V in-system programmable

Endurance of 10,000 program/erase cycles

Enhanced pin-locking architecture

Flexible 36V18 Function Block

•

90 product terms drive any or all of 18 macrocells

within Function Block

Global and product term clocks, output enables,

set and reset signals

Extensive IEEE Std 1149.1 boundary-scan (JTAG)

support

Programmable power reduction mode in each

macrocell

Slew rate control on individual outputs

User programmable ground pin capability

Extended pattern security features for design

protection

High-drive 24 mA outputs

3.3V or 5V I/O capability

CMOS 5V Fast FLASH™ technology

Supports parallel programming of multiple XC9500

devices

Table 1:

XC9500 Device Automotive Family

XC9536

Macrocells

Usable Gates

Registers

(ns)

CNT

(MHz)

(1)

SYSTEM

(MHz)

(2)

800

3.5

4.0

100

XC9572

1,600

7.5

4.5

125

83.3

Refer to XC9500 Family data sheet [September 15,

1999 (version 5.0)] for architecture description

Refer to XC9536 data sheet [December 4, 1998

(version 5.0)] and XC9572XL data sheet [December 4,

1998 (version 3.0)] for pin tables

Family Overview

The XC9500 CPLD Automotive IQ family provides

advanced in-system programming and test capabilities for

high performance, general purpose logic integration. All

devices are in-system programmable for a minimum of

10,000 program/erase cycles. Extensive IEEE 1149.1

(JTAG) boundary-scan support is also included on all family

members.

Notes:

1. f

CNT

= Operating frequency for 16-bit counters.

2. f

SYSTEM

= Internal operating frequency for general

purpose system designs spanning multiple FBs.

Table 2:

Available Packages and Device I/O Pins (not

including dedicated JTAG pins)

XC9536

44-Pin VQFP

100-Pin TQFP

XC9572

http://www.xilinx.com/legal.htm.

All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.

DS120-1 (v1.2) October 18, 2004

Product Specification

www.xilinx.com

1-800-255-7778

XC9500 In-System Programmable CPLD Automotive IQ Family

Absolute Maximum Ratings

Symbol

STG

Description

Supply voltage relative to GND

Input voltage relative to GND

Voltage applied to 3-state output

Junction temperature

Operating temperature

Storage temperature (ambient)

Value

–0.5 to 7.0

–0.5 to V

+ 0.5

–0.5 to V

+ 0.5

+150

–40

C to +125

–65 to +150

Units

Notes:

1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions

is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.

Recommended Operation Conditions

Symbol

CCINT

CCIO

Parameter

Supply voltage for internal logic and input buffers

Supply voltage for output drivers for 5V operation

Supply voltage for output drivers for 3.3V operation

Low-level input voltage

High-level input voltage

Output voltage

Min

4.5

3.0

2.0

Max

5.5

3.6

0.80

CCINT

+ 0.5

CCIO

Units

Quality and Reliability Characteristics

Symbol

Data Retention

Program/Erase Cycles (Endurance)

Parameter

Min

10,000

Max

Units

Years

Cycles

DC Characteristic Over Recommended Operating Conditions

Symbol

Parameter

Output high voltage for 5V outputs

Output high voltage for 3.3V outputs

Output low voltage for 5V outputs

Output low voltage for 3.3V outputs

Input leakage current

I/O high-Z leakage current

I/O capacitance

Operating supply current

(low power mode, active)

Test Conditions

= –4.0 mA, V

= Min

= –3.2 mA, V

= Min

= 24 mA, V

= Min

= 10 mA, V

= Min

= Max. V

= GND or V

= Max, V

= GND or V

= GND, f = 1.0 MHz

= GND, No load

f = 1.0 MHz

XC9536

XC9572

Min

2.4

Max

0.5

0.4

±10

Units

µA

30 (Typical)

65 (Typical)

www.xilinx.com

1-800-255-7778

DS120-1 (v1.2) October 18, 2004

Product Specification

XC9500 In-System Programmable CPLD Automotive IQ Family

Ordering Information

Example:

Device Type

Speed Grade

XC9536 -15 VQ 44 Q

Temperature Range

Number of Pins

Package Type

Device Ordering

Number

XC9536-15VQ44Q

XC9572-15TQ100Q

Speed

(pin-to-pin

delay)

15 ns

Pkg.

Symbol

VQ44

TQ100

No. of

Pins

44-pin

100-pin

Package Type

Thin Quad Flat Pack (VQFP)

Very Thin Quad Flat Pack (TQFP)

Operating

Range

(1)

Notes:

1. Q = Automotive: T

= –40° to +125°C

Revision History

The following table shows the revision history for this document.

Date

1.0

1.1

1.2

Version

11/26/02

02/03/03

10/18/04

Initial Xilinx release.

Added reference to XC9500, XC9536, and XC9572 data sheets.

Added "Not to be used in new designs" watermark; moved to "Mature Products"

Revision

DS120-1 (v1.2) October 18, 2004

Product Specification

www.xilinx.com

1-800-255-7778

More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

XC9536-15VQG44Q Related Products

	XC9536-15VQG44Q	XC9572-15TQG100Q
Description	Flash PLD, CMOS, PQFP44, VQFP-44	Flash PLD, CMOS, PQFP100, TQFP-100
Is it Rohs certified?	conform to	conform to
Maker	XILINX	XILINX
Parts packaging code	QFP	QFP
package instruction	TQFP,	LFQFP,
Contacts	44	100
Reach Compliance Code	compliant	compliant
JESD-30 code	S-PQFP-G44	S-PQFP-G100
JESD-609 code	e3	e3
length	10 mm	14 mm
Humidity sensitivity level	3	3
Number of I/O lines	34	72
Number of terminals	44	100
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C
organize	34 I/O	72 I/O
Output function	MACROCELL	MACROCELL
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TQFP	LFQFP
Package shape	SQUARE	SQUARE
Package form	FLATPACK, THIN PROFILE	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260	260
Programmable logic type	FLASH PLD	FLASH PLD
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1.6 mm
Maximum supply voltage	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Matte Tin (Sn)	Matte Tin (Sn)
Terminal form	GULL WING	GULL WING
Terminal pitch	0.8 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	40	30
width	10 mm	14 mm

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