2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
2.5V ZERO DELAY CLOCK
BUFFER, SPREAD SPECTRUM
COMPATIBLE
FEATURES:
•
•
•
•
•
•
•
•
•
•
•
Phase-Lock Loop Clock Distribution
10MHz to 133MHz operating frequency
Distributes one clock input to one bank of five outputs
Zero Input-Output Delay
Output Skew < 250ps
Low jitter <200 ps cycle-to-cycle
No external RC network required
Operates at 2.5V V
DD
Power down mode
Spread spectrum compatible
Available in SOIC package
IDT23S05T
DESCRIPTION:
NOTE: EOL for non-green parts to occur on 5/13/10 per
PDN U-09-01
The IDT23S05T is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incoming clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT23S05T is an 8-pin version of the IDT23S09T. IDT23S05T
accepts one reference input, and drives out five low skew clocks. All parts
have on-chip PLLs which lock to an input clock on the REF pin. The PLL
feedback is on-chip and is obtained from the CLKOUT pad. In the absence
of an input clock, the IDT23S05T enters power down. In this mode, the
device will draw less than 12μA for Commercial Temperature Range and
and less than 25μA for Industrial temperature range, the outputs are tri-
stated, and the PLL is not running, resulting in a significant reduction of
power. The IDT23S05T is characterized for both Industrial and Commer-
cial operation.
FUNCTIONAL BLOCK DIAGRAM
8
CLKOUT
REF
1
PLL
Control
Logic
3
CLK1
2
CLK2
5
7
CLK3
CLK4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
c
2012
Integrated Device Technology, Inc.
APRIL
2012
DSC 6397/11
IDT23S05T
2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
DD
Rating
Supply Voltage Range
Input Voltage Range (REF)
Input Voltage Range
(except REF)
I
IK
(V
I
< 0)
I
O
(V
O
= 0 to V
DD
)
V
DD
or GND
T
A
= 55°C
(in still air)
(3)
T
STG
Operating
Temperature
Input Clamp Current
Continuous Output Current
Continuous Current
Maximum Power Dissipation
Storage Temperature Range
Commercial
Industrial
Max.
–0.5 to +4.6
–0.5 to +5.5
–0.5 to
V
DD
+0.5
–50
±50
±100
0.7
–65 to +150
0 to +70
–40 to +85
mA
mA
mA
W
°C
°C
Unit
V
V
V
V
I (2)
V
I
REF
CLK2
CLK1
GND
1
2
3
4
8
7
6
5
CLKOUT
CLK4
V
DD
CLK3
SOIC
TOP VIEW
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output
clamp-current ratings are observed.
3. The maximum package power dissipation is calculated using a junction temperature
of 150°C and a board trace length of 750 mils.
APPLICATIONS:
•
•
•
•
•
SDRAM
Telecom
Datacom
PC Motherboards/Workstations
Critical Path Delay Designs
PIN DESCRIPTION
Pin Name
REF
(1)
CLK2
(2)
CLK1
GND
CLK3
(2)
V
DD
CLK4
(2)
CLKOUT
(2)
NOTES:
1. Weak pull down.
2. Weak pull down on all outputs.
(2)
Pin Number
1
2
3
4
5
6
7
8
Type
IN
Out
Out
Ground
Out
PWR
Out
Out
Output clock
Output clock
Ground
Output clock
2.5V Supply
Output clock
Functional Description
Input reference clock, 3.3V tolerant input
Output clock, internal feedback on this pin
2
IDT23S05T
2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
OPERATING CONDITIONS
Symbol
V
DD
T
A
C
L
C
IN
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance 10MHz - 133MHz
Input Capacitance
Commercial
Industrial
Parameter
Min.
2.3
0
–40
—
—
Max.
2.7
+70
+85
15
7
pF
pF
Unit
V
°
C
DC ELECTRICAL CHARACTERISTICS
Symbol
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
DD_PD
I
DD
Parameter
Input LOW Voltage Level
Input HIGH Voltage Level
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Power Down Current
Supply Current
V
IN
= 0V
V
IN
= V
DD
Standard Drive, I
OL
= 8mA
Standard Drive, I
OH
= -8mA
REF = 0MHz
Unloaded Outputs at 66.66MHz
Commercial
Industrial
Conditions
Min.
—
1.7
—
—
—
2
—
—
—
Max.
0.7
—
50
100
0.3
—
12
25
32
mA
Unit
V
V
µA
µA
V
V
µA
SWITCHING CHARACTERISTICS
Symbol
t
1
t
3
t
4
t
5
t
6
t
7
t
J
t
LOCK
Parameter
Output Frequency
Duty Cycle = t
2
÷
t
1
Rise Time
Fall Time
Output to Output Skew
Delay, REF Rising Edge to CLKOUT Rising Edge
Device-to-Device Skew
Cycle-to-Cycle Jitter, pk - pk
PLL Lock Time
(1,2)
Conditions
15pF Load
Measured at V
DD
/2, F
OUT
= 66.66MHz
Measured between 0.7V and 1.7V
Measured between 0.7V and 1.7V
All outputs equally loaded
Measured at V
DD
/2
Measured at V
DD
/2 on the CLKOUT pins of devices
Measured at 66.66MHz, loaded outputs
Stable power supply, valid clock presented on REF pin
Min.
10
40
—
—
—
—
—
—
—
Typ.
—
50
—
—
—
0
0
—
—
Max.
133
60
2.5
2.5
250
±350
700
200
1
Unit
MHz
%
ns
ns
ps
ps
ps
ps
ms
NOTES:
1. REF Input has a threshold voltage of V
DD
/2.
2. All parameters specified with loaded outputs.
3
IDT23S05T
2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
ZERO DELAY AND SKEW CONTROL
All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative
loading can affect and adjust the input/output delay.
For designs utilizing zero I/O Delay, all outputs including CLKOUT must be equally loaded. Even if the output is not used, it must have a capacitive
load equal to that on the other outputs in order to obtain true zero I/O Delay. For zero output-to-output skew, all outputs must be loaded equally.
SPREAD SPECTRUM COMPATIBLE
Many systems being designed now use a technology called Spread Spectrum Frequency Timing Generation. This product is designed not to filter
off the Spread Spectrum feature of the reference input, assuming it exists. When a zero delay buffer is not designed to pass the Spread Spectrum feature
through, the result is a significant amount of tracking skew, which may cause problems in systems requiring synchronization.
4
IDT23S05T
2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
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