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74LVC38APG

Description
NAND Gate, CMOS, PDSO14
Categorylogic    logic   
File Size271KB,5 Pages
ManufacturerIDT (Integrated Device Technology)
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74LVC38APG Overview

NAND Gate, CMOS, PDSO14

74LVC38APG Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Reach Compliance Codenot_compliant
JESD-30 codeR-PDSO-G14
JESD-609 codee0
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply3.3 V
Prop。Delay @ Nom-Sup5.2 ns
Certification statusNot Qualified
Schmitt triggerNO
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL

74LVC38APG Related Products

74LVC38APG 74LVC38ADC 74LVC38APY
Description NAND Gate, CMOS, PDSO14 NAND Gate, CMOS, PDSO14 NAND Gate, CMOS, PDSO14
Is it Rohs certified? incompatible incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Reach Compliance Code not_compliant unknown unknown
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PDSO-G14
JESD-609 code e0 e0 e0
Logic integrated circuit type NAND GATE NAND GATE NAND GATE
MaximumI(ol) 0.024 A 0.024 A 0.024 A
Number of terminals 14 14 14
Maximum operating temperature 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C
Output characteristics OPEN-DRAIN OPEN-DRAIN OPEN-DRAIN
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SOP SSOP
Encapsulate equivalent code TSSOP14,.25 SOP14,.25 SSOP14,.3
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH
power supply 3.3 V 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 5.2 ns 5.2 ns 5.2 ns
Certification status Not Qualified Not Qualified Not Qualified
Schmitt trigger NO NO NO
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 0.635 mm 1.27 mm 0.635 mm
Terminal location DUAL DUAL DUAL
package instruction - SOP, SOP14,.25 SSOP, SSOP14,.3
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