SN74LS18J datasheet, PDF - EEWORLD Datasheet

SN74LS18J: DescriptionLS SERIES, DUAL 4-INPUT NAND GATE, CDIP14; Categorylogic logic; File Size82KB，4 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SN74LS18J Overview

LS SERIES, DUAL 4-INPUT NAND GATE, CDIP14

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Texas Instruments
package instruction	DIP, DIP14,.3
Reach Compliance Code	not_compliant
series	LS
JESD-30 code	R-GDIP-T14
length	19.56 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.008 A
Number of functions	2
Number of entries	4
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	10 mA
Prop。Delay @ Nom-Sup	55 ns
propagation delay (tpd)	55 ns
Certification status	Not Qualified
Schmitt trigger	YES
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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