EP610JI-30 datasheet, PDF - EEWORLD Datasheet

EP610JI-30: DescriptionUV PLD, 32ns, PAL-Type, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28; CategoryProgrammable logic devices Programmable logic; File Size171KB，6 Pages; ManufacturerAltera (Intel)

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EP610JI-30 Overview

UV PLD, 32ns, PAL-Type, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Altera (Intel)
Parts packaging code	QLCC
package instruction	WQCCJ, LDCC28,.5SQ
Contacts	28
Reach Compliance Code	compliant
Other features	MACROCELLS INTERCONNECTED BY GLOBAL BUS; 16 MACROCELLS; 2 EXTERNAL CLOCKS
Architecture	PAL-TYPE
maximum clock frequency	33.3 MHz
JESD-30 code	S-CQCC-J28
JESD-609 code	e0
length	11.43 mm
Dedicated input times	4
Number of I/O lines	16
Number of entries	20
Output times	16
Number of product terms	160
Number of terminals	28
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	4 DEDICATED INPUTS, 16 I/O
Output function	MACROCELL
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	WQCCJ
Encapsulate equivalent code	LDCC28,.5SQ
Package shape	SQUARE
Package form	CHIP CARRIER, WINDOW
Peak Reflow Temperature (Celsius)	220
power supply	5 V
Programmable logic type	UV PLD
propagation delay	32 ns
Certification status	Not Qualified
Maximum seat height	4.826 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	11.43 mm

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