HY62UF16101CLLF-I-55 datasheet, PDF

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HY62UF16101CLLF-I-55: DescriptionStandard SRAM, 64KX16, 55ns, CMOS, PBGA48, FBGA-48; Categorystorage storage; File Size163KB，9 Pages; ManufacturerSK Hynix; Websitehttp://www.hynix.com/eng/

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HY62UF16101CLLF-I-55 Overview

Standard SRAM, 64KX16, 55ns, CMOS, PBGA48, FBGA-48

HY62UF16101CLLF-I-55 Parametric

Parameter Name	Attribute value
Maker	SK Hynix
Parts packaging code	BGA
package instruction	TFBGA,
Contacts	48
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	55 ns
JESD-30 code	R-PBGA-B48
JESD-609 code	e1
length	6.3 mm
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	16
Number of functions	1
Number of terminals	48
word count	65536 words
character code	64000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	64KX16
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	3.3 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	0.75 mm
Terminal location	BOTTOM
width	6.2 mm

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HY62UF16101C Series

64Kx16bit full CMOS SRAM

PRELIMINARY

DESCRIPTION

The HY62UF16101C is a high speed, super low

power and 1M bit full CMOS SRAM organized as

65,536 words by 16bit. The HY62UF16101C uses

high performance full CMOS process technology

and designed for high speed low power circuit

technology. It is particularly well suited for used in

high density low power system application. This

device has a data retention mode that guarantees

data to remain valid at a minimum power supply

voltage of 1.2V.

FEATURES

•

Fully static operation and Tri-state output

•

TTL compatible inputs and outputs

•

Battery backup(LL/SL-part)

-. 1.2V(min) data retention

•

Standard pin configuration

-. 44 – TSOP II - 400mil

-. 48 - FBGA

Product

Voltage

Speed

No.

(V)

(ns)

HY62UF16101C

2.7~3.3 55/70/85

HY62UF16101C-I

2.7~3.3 55/70/85

Note 1. Blank : Commercial, I : Industrial

2. Current value is max.

Operation

Current/Icc(mA)

Standby Current(uA)

Temperature

(°C)

0~70

-40~85(I)

PIN CONNECTION

/LB

/OE A0

A1~A7

/CS

I/O1

I/O2

I/O3

I/O4

Vcc

GND

I/O5

I/O6

I/O7

I/O8

/WE

A15

A14

A13

A12

/OE

/UB

/LB

I/O16

I/O15

I/O14

I/O13

GND

Vcc

I/O12

I/O11

I/O10

I/O9

A10

A11

BLOCK DIAGRAM

ADD INPUT

BUFFER

ROW

DECODER

I/O1

SENSE AMP

IO9 /UB A3

IO10 IO11 A5

Vss IO12 NC

Vcc IO13 NC

/CS IO1

IO2 IO3

IO4 Vcc

IO5 Vss

A14

A15

A10

A11

A12

A13

/CS

/OE

/LB

/UB

/WE

DECODER

I/O8

BUFFER

ADD INPUT

BUFFER

PRE DECODER

MEMORY

ARRAY

64K x 16

WRITE DRIVER

I/O9

BLOCK

DECODER

IO15 IO14 A14 A15 IO6 IO7

IO16 NC

A12 A13 /WE IO8

A10 A11 NC

ADD INPUT

BUFFER

I/O16

FBGA

TSOP¥

PIN DESCRIPTION

Pin Name

/CS

/WE

/OE

/LB

/UB

Pin Function

Chip Select

Write Enable

Output Enable

Low Byte Control(I/O1~I/O8)

Upper Byte Control(I/O9~I/O16)

Pin Name

I/O1~I/O16

A0~A15

Vcc

Vss

Pin Function

Data Inputs / Outputs

Address Inputs

Power(2.7V~3.3V)

Ground

No Connection

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any

responsibility for use of circuits described. No patent licenses are implied.

Rev.02 /Jun. 00

Hyundai Semiconductor

HY62UF16101CLLF-I-55 Related Products

	HY62UF16101CLLF-I-55	HY62UF16101CSLF-I-55	HY62UF16101CSLF-I-85	HY62UF16101CLLF-I-70	HY62UF16101CSLF-I-70	HY62UF16101CLLF-I-85
Description	Standard SRAM, 64KX16, 55ns, CMOS, PBGA48, FBGA-48	Standard SRAM, 64KX16, 55ns, CMOS, PBGA48, FBGA-48	Standard SRAM, 64KX16, 85ns, CMOS, PBGA48, FBGA-48	Standard SRAM, 64KX16, 70ns, CMOS, PBGA48, FBGA-48	Standard SRAM, 64KX16, 70ns, CMOS, PBGA48, FBGA-48	Standard SRAM, 64KX16, 85ns, CMOS, PBGA48, FBGA-48
Parts packaging code	BGA	BGA	BGA	BGA	BGA	BGA
package instruction	TFBGA,	TFBGA,	TFBGA,	TFBGA,	TFBGA,	TFBGA,
Contacts	48	48	48	48	48	48
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum access time	55 ns	55 ns	85 ns	70 ns	70 ns	85 ns
JESD-30 code	R-PBGA-B48	R-PBGA-B48	R-PBGA-B48	R-PBGA-B48	R-PBGA-B48	R-PBGA-B48
JESD-609 code	e1	e1	e1	e1	e1	e1
length	6.3 mm	6.3 mm	6.3 mm	6.3 mm	6.3 mm	6.3 mm
memory density	1048576 bit	1048576 bit	1048576 bit	1048576 bit	1048576 bit	1048576 bit
Memory IC Type	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM
memory width	16	16	16	16	16	16
Number of functions	1	1	1	1	1	1
Number of terminals	48	48	48	48	48	48
word count	65536 words	65536 words	65536 words	65536 words	65536 words	65536 words
character code	64000	64000	64000	64000	64000	64000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
organize	64KX16	64KX16	64KX16	64KX16	64KX16	64KX16
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.1 mm	1.1 mm	1.1 mm	1.1 mm	1.1 mm	1.1 mm
Maximum supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Minimum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
Nominal supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.75 mm	0.75 mm	0.75 mm	0.75 mm	0.75 mm	0.75 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
width	6.2 mm	6.2 mm	6.2 mm	6.2 mm	6.2 mm	6.2 mm
Maker	SK Hynix	-	-	SK Hynix	SK Hynix	SK Hynix

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