4MX1, DRAM CONTROLLER, PQCC84, PLASTIC, LCC-84
| Parameter Name | Attribute value |
| Maker | Texas Instruments |
| Parts packaging code | LCC |
| package instruction | QCCJ, |
| Contacts | 84 |
| Reach Compliance Code | unknown |
| Address bus width | 22 |
| boundary scan | NO |
| maximum clock frequency | 25 MHz |
| External data bus width | |
| JESD-30 code | S-PQCC-J84 |
| length | 29.3116 mm |
| low power mode | YES |
| memory organization | 4M X 1 |
| Number of blocks | 4 |
| Number of terminals | 84 |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | QCCJ |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Certification status | Not Qualified |
| Maximum seat height | 5.08 mm |
| Maximum slew rate | 95 mA |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal form | J BEND |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
| width | 29.3116 mm |
| uPs/uCs/peripheral integrated circuit type | MEMORY CONTROLLER, DRAM |
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