8T49N008A-DDDNLGI8 datasheet, PDF

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8T49N008A-DDDNLGI8: DescriptionClock Generator, 1250MHz, CMOS, 6 X 6 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJC-3, MO-220VJJD-5, VFQFPN-40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size498KB，38 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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8T49N008A-DDDNLGI8 Overview

Clock Generator, 1250MHz, CMOS, 6 X 6 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJC-3, MO-220VJJD-5, VFQFPN-40

8T49N008A-DDDNLGI8 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
package instruction	HVQCCN,
Reach Compliance Code	compliant
ECCN code	EAR99
Other features	ALSO OPERATES TA 3.3 V SUPPLY; ALSO AVILABE IN 0.65 MM PITCH PACKAGE
JESD-30 code	S-XQCC-N40
length	6 mm
Number of terminals	40
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	1250 MHz
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Master clock/crystal nominal frequency	40 MHz
Maximum seat height	1 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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Programmable FemtoClock

NG LVPECL/LVDS

Clock Generator with 8-Outputs

IDT8T49N008I

DATASHEET

General Description

The IDT8T49N008I is an eight output Clock Synthesizer with

selectable LVDS or LVPECL outputs. The IDT8T49N008I can

synthesize any one of four frequencies from a single crystal or

reference clock. The four frequencies are selected from the

Frequency Selection Table (Table 3A) and are programmed via I

interface. The four predefined frequencies are selected in the user

application by two frequency selection pins. Note the desired

programmed frequencies must be used with the corresponding

crystal or clock frequency as indicated in Table 3A.

Excellent phase noise performance is maintained with IDT’s Fourth

Generation FemtoClock

NG PLL technology, which delivers

sub-400fs RMS phase jitter.

Features

•

Fourth Generation FemtoClock NG PLL technology

Eight selectable LVPECL or LVDS outputs

CLK, nCLK input pair can accept the following differential input

levels: LVPECL, LVDS, HCSL

FemtoClock NG VCO Range: 1.91GHz - 2.5GHz

RMS phase jitter at 156.25MHz (12kHz - 20MHz):

228fs (typical)

RMS phase jitter at 156.25MHz (10kHz - 1MHz): 175fs (typical)

Full 2.5V or 3.3V power supply

C programming interface

PCI Express (2.5 Gb/S), Gen 2 (5 Gb/s) and Gen 3 (8 Gb/s) jitter

compliant

-40°C to 85°C ambient operating temperature

Lead-free (RoHS 6) packaging

Pin Assignment

nQ4

nQ5

CCO

nQ6

nQ7

30 29 28 27 26 25 24 23 22 21

SCLK

SDATA

CCA

LOCK

CLK_SEL

9 10

FSEL1

ADDR_SEL

FSEL0

nCLK

CLK

XTAL_OUT

XTAL_IN

IDT8T49N008I

40-Lead VFQFN

6mm x 6mm x 0.925mm package body

4.65mm x 4.65mm E-Pad

NL Package

IDT8T49N008ANLGI REVISION A FEBRUARY 13, 2014

nQ0

nQ1

CCO

nQ2

nQ3

8T49N008A-DDDNLGI8 Related Products

	8T49N008A-DDDNLGI8	8T49N008A-DDDNLGI
Description	Clock Generator, 1250MHz, CMOS, 6 X 6 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJC-3, MO-220VJJD-5, VFQFPN-40	Clock Generator, 1250MHz, CMOS, 6 X 6 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJC-3, MO-220VJJD-5, VFQFPN-40
Is it Rohs certified?	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
package instruction	HVQCCN,	HVQCCN,
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
Other features	ALSO OPERATES TA 3.3 V SUPPLY; ALSO AVILABE IN 0.65 MM PITCH PACKAGE	ALSO OPERATES TA 3.3 V SUPPLY; ALSO AVILABE IN 0.65 MM PITCH PACKAGE
JESD-30 code	S-XQCC-N40	S-XQCC-N40
length	6 mm	6 mm
Number of terminals	40	40
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Maximum output clock frequency	1250 MHz	1250 MHz
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
Master clock/crystal nominal frequency	40 MHz	40 MHz
Maximum seat height	1 mm	1 mm
Maximum supply voltage	2.625 V	2.625 V
Minimum supply voltage	2.375 V	2.375 V
Nominal supply voltage	2.5 V	2.5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	6 mm	6 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER

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