UNISONIC TECHNOLOGIES CO., LTD
TL074
LOW NOISE QUAD J-FET
OPERATIONAL AMPLIFIER
SOP-14
LINEAR INTEGRATED CIRCUIT
DESCRIPTION
The UTC
TL074
is a high speed J-FET input quad
operational amplifier. It incorporates well matched, high
voltage J-FET and bipolar transistors in a monolithic
integrated circuit. The device features high slew rates, low
input bias and offset current, and low offset voltage
temperature coefficient.
FEATURES
*Low power consumption
*Wide common-mode (up to Vcc+ ) and differential voltage
range
*Low input bias and offset current
*Low noise eN = 15nV /
√
Hz(typ)
*Output short-circuit protection
*High input impedance J-FET input stage
*Low harmonic distortion:0.01%(typ)
*Internal frequency compensation
*Latch up free operation
*High slewrate:13V/µs(typ)
DIP-14
*Pb-free plating product number: TL074L
ORDERING INFORMATION
Ordering Number
Normal
Lead Free Plating
TL074-D14-T
TL074L-D14-T
TL074-S14-R
TL074L-S14-R
TL074-S14-T
TL074L-S14-T
Package
DIP-14
SOP-14
SOP-14
Packing
Tube
Tape Reel
Tube
TL074L-D14-T
(1)Packing Type
(2)Package Type
(3)Lead Plating
(1) T: Tube, R: Tape Reel
(2) D14: DIP-14, S14: SOP-14
(3) L: Lead Free Plating, Blank: Pb/Sn
www.unisonic.com.tw
Copyright © 2007 Unisonic Technologies Co., Ltd
1 of 10
QW-R105-005,D
TL074
PIN CONFIGURATIONS
LINEAR INTEGRATED CIRCUIT
Output 1 1
-
+
-
+
-
+
-
+
Inverting Input 1 2
Non-inverting Input 1 3
V
CC
+ 4
Non-inverting Input 2 5
Inverting Input 2 6
Output 2 7
14 Output 4
13 Inverting Input 4
12 Non-inverting Input 4
11 V
CC
-
10 Non-inverting Input 3
9
8
Inverting Input 3
Output 3
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
2 of 10
QW-R105-005,D
TL074
SCHEMATIC DIAGRAM
V
CC
+
LINEAR INTEGRATED CIRCUIT
Non-inverting
Input
Non-inverting
Input
100Ω
200
Ω
Output
100Ω
30 k
8.2k
1 .3k
35 k
1.3k
35k
100
Ω
V
CC
-
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
3 of 10
QW-R105-005,D
TL074
ABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
LINEAR INTEGRATED CIRCUIT
PARAMETER
SYMBOL
RATING
UNIT
Supply Voltage (Note 1)
V
CC
±18
V
Input Voltage (Note 2)
V
IN
±15
V
Differential Input Voltage (Note 3)
V
I(DIFF)
±30
V
Power Dissipation
P
D
680
mW
Output Short-Circuit Duration (Note 4)
Infinite
Operating Temperature
T
OPR
0 ~ 70
°C
Storage Temperature
T
STG
5 ~ 150
°C
Notes: 1. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of
the supply voltages where the zero reference level is the midpoint between Vcc- and Vcc+.
2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts,
whichever is less.
3. Differential voltages are at the non-inverting input terminal with respect to the inverting input terminal.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be
limited to ensure that the dissipation rating is not exceeded.
5. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
4 of 10
QW-R105-005,D
TL074
ELECTRICAL CHARACTERISTICS
(Vcc=±15V,
Ta=25°C, unless otherwise specified)
PARAMETER
Input Offset Voltage
Temperature Coefficient of Input
Offset Voltage
Input Offset Current*
Input Bias Current*
Input Common Mode Voltage
Output Voltage Swing
SYMBOL
V
I(OFF)
ΔV
I(OFF)
I
I(OFF)
I
I(BIAS)
V
I(CM)
V
O(SW)
LINEAR INTEGRATED CIRCUIT
TEST CONDITIONS
Rs=50Ω
Rs=50Ω
Ta=25°C
T
MIN
≤Ta≤T
MAX
Ta=25°C
T
MIN
≤Ta≤T
MAX
R
L
=2kΩ
Ta=25°C
R
L
=10kΩ
R
L
=2kΩ
T
MIN
≤Ta≤T
MAX
R
L
=10kΩ
R
L
=10kΩ,
Ta=25°C
V
OUT
=±10V T
MIN
≤Ta≤T
MAX
R
L
=10kΩ, C
L
=100pF
R
S
=50Ω
R
S
=50Ω
No Load
Ta=25°C
T
MIN
≤Ta≤T
MAX
Ta=25°C
T
MIN
≤Ta≤T
MAX
Ta=25°C
T
MIN
≤Ta≤T
MAX
Ta=25°C
T
MIN
≤Ta≤T
MAX
MIN
TYP
3
MAX
6
7
UNIT
mV
mV
µV/°C
10
5
20
±11
10
12
10
12
50
25
2
80
80
80
80
-12~+15
12
13.5
100
4
200
20
pA
nA
pA
nA
V
V
V
V
V
V/mV
V/mV
MHz
Ω
dB
dB
dB
dB
mA
mA
dB
mA
mA
V/µs
µs
%
%
Large Signal Voltage Gain
Gain Bandwidth Product
Input Resistance
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Supply Current
Channel Separation
Output Short-circuit Current
Slew Rate
Rise Time
Overshoot Factor
Total Harmonic Distortion
G
V
GB
W
R
IN
CMR
SVR
I
CC
V01/V02
I
O(SC)
SR
t
R
Kov
THD
200
3
10
12
86
86
1.4
120
40
13
0.1
10
0.01
2.5
2.5
60
60
Gv=100
Ta=25°C
T
MIN
≤Ta≤T
MAX
V
IN
=10V, R
L
=2kΩ, C
L
=100pF,
unity gain
V
IN
=20mV, R
L
=2kΩ, C
L
=100pF,
unity gain
V
IN
=20mV, R
L
=2kΩ, C
L
=100pF,
unity gain
Gv=20dB, f=1kHz, R
L
=2kΩ,
C
L
=100pF, V
OUT
=2Vpp)
10
10
8
Phase Margin
45
Deg.
Equivalent Input Noise Voltage
eN
R
S
=100Ω, f=1KHz
15
*The Input bias currents are junction leakage currents, which approximately double for every 10°C increase in the
junction temperature.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 10
QW-R105-005,D