TA7774P/PG/F/FG
TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT
SILICON MONOLITHIC
TA7774P/PG,TA7774F/FG
STEPPING MOTOR DRIVER IC
The TA7774P/PG, TA7774F/FG is 2 phase Bipolar stepping motor
driver IC designed especially for 3.5 or 5.25 inches FDD head
actuator drives.
It consists of TTL compatible input circuit, dual bridge driver
outputs with flyback diodes, changing circuit of motor coil drive
voltage (Power saving circuit) and stand−by circuit.
TA7774P/PG
FEATURES
One Chip 2 Phase Bipolar Stepping Motor Driver.
Power Saving and Stand−by Operation are available.
I stand−by (I
CC3
)
≤
115 µA
Build−in Punch Through Current Restriction Circuit for
System Reliability and Noise Suppression.
TTL Compatible Inputs
Surface Mount is available with F Type.
Output Current up to 0.4 A (peak)
TA7774F/FG
The TA7774PG/FG:
The TA7774PG/FG is a Pb-free product.
The following conditions apply to solderability:
*Solderability
1. Use of Sn-63Pb solder bath
*solder bath temperature = 230°C
*dipping time = 5 seconds
*number of times = once
*use of R-type flux
2. Use of Sn-3.0Ag-0.5Cu solder bath
*solder bath temperature = 245°C
*dipping time = 5 seconds
*the number of times = once
*use of R-type flux
Weight
DIP16−P−300−2.54A : 1.11 g (Typ.)
HSOP16−P−300−1.00 : 0.50 g (Typ.)
Company Headquarters
3 Northway Lane North
Latham,
New York
12110
Toll Free: 800.984.5337
Fax:
518.785.4725
Web: www.marktechopto.com | Email: info@marktechopto.com
California Sales Office:
950 South Coast Drive, Suite 265
Costa Mesa, California 92626
Toll Free: 800.984.5337
Fax: 714.850.9314
TA7774P/PG/F/FG
BLOCK DIAGRAM
TA7774P/PG/F/FG
Note:
Pin(2), (7), (12), (13) of TA7774F/FG are all NC and Heat Fin is connected to GND.
PIN FUNCTION
PIN No.
1 / (1)
2 / (3)
3 / (4)
4 / (F)
5 / (F)
6 / (5)
7 / (6)
8 / (8)
9 / (9)
10 / (10)
11 / (11)
12 / (F)
13 / (F)
14 / (14)
15 / (15)
16 / (16)
SYMBOL
V
S2 A
V
CC
IN A
GND
GND
IN B
PS
V
S2 B
V
S1 B
φB
φ
B
GND
GND
φΑ
φA
V
S1 A
FUNCTIONAL DESCRIPTION
Low−voltage power supply terminal
Power voltage supply terminal for control
A−ch forward rotation / reverse rotation signal input terminal
GND terminal
GND terminal
B−ch forward rotation / reverse rotation signal input terminal
Powersave signal input terminal
Stand−by signal input terminal
High−voltage power supply terminal
Output B
Output
B
GND terminal
GND terminal
Output
Α
Output A
High−voltage power supply terminal.
( ):
TA7774F/FG
2
2003-08-04
TA7774P/PG/F/FG
ELECTRICAL CHARACTERISTICS
TEST
CIR−
CUIT
(Unless otherwise specified, Ta = 25°C, V
CC
= 5 V, V
S1
= 12 V, V
S2A
= 5 V)
CHARACTERISTIC
SYMBOL
I
CC1
Supply Current
I
CC2
I
CC3
V
IN H
V
IN L
Input Voltage
V
PS H
V
PS L
V
S2 BH
V
S2 BL
Input Current
I
IN
I
PS
V
SAT 1H1
V
SAT 1H2
V
SAT 2H1
Output Saturation Voltage
V
SAT 2H2
V
SAT L1
V
SAT L2
V
SAT L3
Diode Forward Voltage
V
F U
V
F L
t
pLH
t
pHL
V
CC (opr.)
2
V
S2
: H
3
1
―
T
j
= 25°C
V
S2
: H
Pin (7)
1
TEST CONDITION
PS: H, V
S2
: H
PS: L, V
S2
: H
V
S2
: L
Pin (3), (6)
MIN
―
―
70
2.0
GND
2.0
GND
3.5
GND
―
―
―
―
―
―
―
―
―
―
―
―
―
4.5
TYP.
9
8.5
90
―
―
―
―
―
―
2.6
2.6
0.9
1.2
1.6
1.8
0.03
0.15
0.35
1.5
1.0
7
2
5.0
MAX
14
13
115
V
CC
0.8
V
CC
0.8
V
CC
0.4
30
30
―
1.5
―
2.1
―
―
0.6
―
―
―
―
5.5
V
V
µA
V
µA
UNIT
mA
T
j
= 25°C
Pin (8)
Pin (3), (6)
T
j
= 25°C, V
S2
: H
V
IN
/ PS (2 V): Sink current Pin (7)
PS: L, V
S2
: H
I
OUT
= 100 mA
I
OUT
= 400 mA
I
OUT
= 20 mA
I
OUT
= 100 mA
I
OUT
= 20 mA
I
OUT
= 100 mA
I
OUT
= 400 mA
I
F
= 350 mA
2
PS: H, V
S2
: H
4
Delay Time
Operating Voltage
―
―
IN
− φ
V
CC
= ST
µs
V
Recommendable Operating Voltage
Operating Voltage Restriction
V
S1 (opr.)
12 V ± 10%
V
S2A (opr.)
5 V ± 10%
V
S1
≥
V
S2A
5
2003-08-04
FPGA/CPLD
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