Dec. 13, 2009
Automotive Grade
AUIRS211(0,3)S
HIGH- AND LOW-SIDE DRIVER
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Floating channel designed for bootstrap operation
Fully operational to +500 V or +600 V
Tolerant to negative transient voltage – dV/dt immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V input logic compatible
Separate logic supply range from 3.3 V to 20 V
Logic and power ground ±5 V offset
CMOS Schmitt-triggered inputs with pull-down
Cycle by cycle edge-triggered shutdown logic
Matched propagation delay for both channels
Output in phase with inputs
Leadfree, roHS Compliant
Automotive qualified*
Product Summary
Topology
V
OFFSET
V
OUT
I
o+
& I
o-
(typical)
t
ON
& t
OFF
(typical)
Delay Matching (max.)
AUIRS2110
AUIRS2113
2 channels
500 V max
600 V max
10 V – 20 V
2.5 A / 2.5 A
140 ns & 120 ns
35 ns max
Package Option
Typical Applications
•
•
•
•
•
•
Hybrid electric vehicles
Air condition drives, pumps, fans
Automotive general purpose dual LS/HS driver
Automotive motor drives
Automotive DC/DC converters
Automotive injection control
16-Lead SOIC
AUIRS211(0,3)S
Typical Connection Diagram
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© 2008 International Rectifier
AUIRS211(0,3)S
Table of Contents
Description
Qualification Information
Absolute Maximum Ratings
Recommended Operating Conditions
Static Electrical Characteristics
Dynamic Electrical Characteristics
Functional Block Diagram
Input/Output Pin Equivalent Circuit Diagram
Lead Definitions
Lead Assignments
Application Information and Additional Details
Parameter Temperature Trends
Package Details
Tape and Reel Details
Part Marking Information
Ordering Information
Page
3
4
5
5
6
6
7
8
9
9
10-11
12-14
15
16
17
18
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© 2008 International Rectifier
2
AUIRS211(0,3)S
Description
The AUIRS211(0,3)S are high voltage, high speed power MOSFET and IGBT drivers with independent high and
low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized
monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic.
The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction.
Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used
to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 500 V or 600 V.
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© 2008 International Rectifier
3
AUIRS211(0,3)S
Qualification Information
†
Qualification Level
Automotive
(per AEC-Q100
††
)
Comments: This family of ICs has passed an Automotive
qualification. IR’s Industrial and Consumer qualification level
is granted by extension of the higher Automotive level.
MSL3
†††
260°C
SOIC16W
(per IPC/JEDEC J-STD-020)
Class M2 (Pass +/-200V)
(per AEC-Q100-003)
Class H1B (Pass +/-1000V)
(per AEC-Q100-002)
Class C4 (Pass +/-1000V)
(per AEC-Q100-011)
Class II, Level A
(per AEC-Q100-004)
Yes
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device Model
IC Latch-Up Test
RoHS Compliant
†
††
†††
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/
Exceptions to AEC-Q100 requirements are noted in the qualification report.
Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
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© 2008 International Rectifier
4
AUIRS211(0,3)S
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
(AUIRS2110)
-0.3
520 (†)
V
B
High-side floating supply voltage
(AUIRS2113)
-0.3
620 (†)
V
S
High-side floating supply offset voltage
V
B
- 20
V
B
+ 0.3
V
HO
High-side floating output voltage
V
S
- 0.3
V
B
+ 0.3
V
V
CC
Low-side fixed supply voltage
-0.3
20
V
LO
Low-side output voltage
-0.3
V
CC
+ 0.3
V
DD
Logic supply voltage
-0.3
V
SS
+ 20 (†)
V
SS
Logic supply offset voltage
V
CC
- 20
V
CC
+ 0.3
V
IN
Logic input voltage (HIN, LIN & SD)
V
SS
-0.3
V
DD
+ 0.3
dV
S
/dt
Allowable offset supply voltage transient (Fig. 2)
—
50
V/ns
P
D
Package power dissipation @ TA
≤
25°C
—
1.25
100
150
150
300
W
°C/W
°C
Rth
JA
Thermal resistance, junction to ambient
—
T
J
Junction temperature
—
T
S
Storage temperature
-55
T
L
Lead temperature (soldering, 10 seconds)
—
† All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used within
the recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at 15 V differential.
Min.
V
S
+10
(AUIRS2110)
†
V
S
High-side floating supply offset voltage
(AUIRS2113)
†
V
HO
High-side floating output voltage
V
S
V
CC
Low-side fixed supply voltage
10
V
LO
Low-side output voltage
0
V
DD
Logic supply voltage
V
SS
+ 3
V
SS
Logic ground offset voltage
-5 (††)
V
IN
Logic input voltage (HIN, LIN & SD)
V
SS
T
A
Ambient temperature
-40
†
Logic operational for V
S
of -4 V to +500 V. Logic state held for V
S
of -4 V to – V
BS.
(Please refer to the Design Tip DT97 -3 for more details).
†† When V
DD
< 5 V, the minimum V
SS
offset is limited to –V
DD
.
Symbol
V
B
Definition
High-side floating supply absolute voltage
Max.
V
S
+20
500
600
V
B
20
V
CC
V
SS
+ 20
5
V
DD
125
Units
V
°C
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© 2008 International Rectifier
5
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