S29GLxxxM MirrorBit
TM
Flash Family
S29GL256M, S29GL128M, S29GL064M, S29GL032M
256 Megabit, 128 Megabit, 64 Megabit, and 32Megabit,
3.0 Volt-only Page Mode Flash Memory featuring
0.23 um MirrorBit process technology
Datasheet
PRELIMINARY
Distinctive Characteristics
Architectural Advantages
Single power supply operation
— 3 volt read, erase, and program operations
Manufactured on 0.23 um MirrorBit process
technology
SecSi™ (Secured Silicon) Sector region
— 128-word/256-byte sector for permanent, secure
identification through an 8-word/16-byte random
Electronic Serial Number, accessible through a
command sequence
— May be programmed and locked at the factory or by
the customer
Flexible sector architecture
— 256Mb: 512 32 Kword (64 Kbyte) sectors
— 128Mb: 256 32 Kword (64 Kbyte) sectors
— 64Mb (uniform sector models): 128 32 Kword (64
Kbyte) sectors or 128 32 Kword sectors
— 64Mb (boot sector models): 127 32Kword (64 Kbyte)
sectors + 8 4Kword (8Kbyte) boot sectors
— 32Mb (uniform sector models): 64 32 Kwords (64
Kbytes) sectors or 64 32 Kword sectors
— 32Mb (boot sector models): 63 32 Kword (64 Kbyte)
sectors + 8 4 Kword (8 Kbyte) boot sectors
Compatibility with JEDEC standards
— Provides pinout and software compatibility for single-
power supply flash, and superior inadvertent write
protection
100,000 erase cycles per sector typical
20-year data retention typical
— 30 ns page read times (256Mb)
— 16-word/32-byte write buffer reduces overall
programming time for multiple-word updates
Low power consumption (typical values at 3.0 V, 5
MHz)
— 15 mA typical active read current
— 50 mA typical erase/program current
— 1 µA typical standby mode current
Package options (specific package options vary by
density)
— 40-pin TSOP/RTSOP
— 48-pin TSOP/RTSOP
— 56-pin TSOP/RTSOP
— 64-ball Fortified BGA
— 48-ball fine-pitch BGA
— 63-ball fine-pitch BGA
— 80-ball fine-pitch BGA
Software & Hardware Features
Software features
— Program Suspend & Resume: read other sectors
before programming operation is completed
— Erase Suspend & Resume: read/program other
sectors before an erase operation is completed
— Data# polling & toggle bits provide status
— CFI (Common Flash Interface) compliant: allows host
system to identify and accommodate multiple flash
devices
Hardware features
— Sector Group Protection: hardware-level method of
preventing write operations within a sector group
— Temporary Sector Unprotect: V
ID
-level m ethod of
charging code in locked sectors
— WP#/ACC input accelerates programming time
(when high voltage is applied) for greater throughput
during system production. Protects first or last sector
regardless of sector protection settings
— Hardware reset input (RESET#) resets device
— Ready/Busy# output (RY/BY#) detects program or
erase cycle completion
Performance Characteristics
High performance
— 90 ns access time (128Mb, 64Mb, 32Mb),
100 ns access time (256Mb)
— 4-word/8-byte page read buffer
— 16-word/32-byte write buffer
— 25 ns page read times (128Mb, 64Mb, 32Mb)
Publication Number
S29GLxxxM
Revision
A
Amendment
0
Issue Date
January 29, 2004
P r e l i m i n a r y
General Description
The S29GL256/128/064/032M family of devices are 3.0 V single power Flash
memory manufactured using 0.23 um MirrorBit technology. The S29GL256M is a
256 Mbit, organized as 16,777,216 words or 33,554,432 bytes. The S29GL128M
is a 128 Mbit, organized as 8,388,608 words or 16,777,216 bytes. The
S29GL064M is a 64 Mbit, organized as 4,194,304 words or 8,388,608 bytes. The
S29GL032M is a 32 Mbit, organized as 2,097,152 words or 4,194,304 bytes. De-
pending on the model number, the devices have an 8-bit wide data bus only, 16-
bit wide data bus only, or a 16-bit wide data bus that can also function as an 8-
bit wide data bus by using the BYTE# input. The devices can be programmed ei-
ther in the host system or in standard EPROM programmers.
Access times as fast as 90 ns (S29GL128M, S29GL064M, S29GL032M) or 100 ns
(S29GL256M) are available. Note that each access time has a specific operating
voltage range (V
CC
) as specified in the
Product Selector Guide
and the
Ordering
Information
sections. Package offerings include 40-pin TSOP, 48-pin TSOP, 56-pin
tSOP, 48-ball fine-pitch BGA, 63-ball fine-pitch BGA, 80-ball fine-pitch BGA and
64-ball Fortified BGA, depending on model number. Each device has separate chip
enable (CE#), write enable (WE#) and output enable (OE#) controls.
Each device requires only a
single 3.0 volt power supply
for both read and
write functions. In addition to a V
CC
input, a high-voltage
accelerated program
(ACC)
feature provides shorter programming times through increased current on
the WP#/ACC or ACC input, depending on model number. This feature is intended
to facilitate factory throughput during system production, but may also be used
in the field if desired.
The device is entirely command set compatible with the
JEDEC single-power-
supply Flash standard.
Commands are written to the device using standard mi-
croprocessor write timing. Write cycles also internally latch addresses and data
needed for the programming and erase operations.
The
sector erase architecture
allows memory sectors to be erased and repro-
grammed without affecting the data contents of other sectors. The device is fully
erased when shipped from the factory.
Device programming and erasure are initiated through command sequences.
Once a program or erase operation has begun, the host system need only poll the
DQ7 (Data# Polling) or DQ6 (toggle)
status bits
or monitor the
Ready/Busy#
(RY/BY#)
output to determine whether the operation is complete.
Hardware data protection
measures include a low V
CC
detector that automat-
ically inhibits write operations during power transitions. The hardware sector
protection feature disables both program and erase operations in any combina-
tion of sectors of memory. This can be achieved in-system or via programming
equipment.
The
Erase Suspend/Erase Resume
feature allows the host system to pause an
erase operation in a given sector to read or program any other sector and then
complete the erase operation. The
Program Suspend/Program Resume
fea-
ture enables the host system to pause a program operation in a given sector to
read any other sector and then complete the program operation.
The
hardware RESET# pin
terminates any operation in progress and resets the
device, after which it is then ready for a new operation. The RESET# pin may be
tied to the system reset circuitry. A system reset would thus also reset the device,
2
S29GLxxxM MirrorBit
TM
Flash Family
S29GLxxxMA0 January 29, 2004
P r e l i m i n a r y
enabling the host system to read boot-up firmware from the Flash memory
device.
The device reduces power consumption in the
standby mode
when it detects
specific voltage levels on CE# and RESET#, or when addresses have been stable
for a specified period of time.
The
Write Protect (WP#)
feature protects the first or last sector by asserting
a logic low on the WP#/ACC pin or WP# pin, depending on model number. The
protected sector will still be protected even during accelerated programming.
The
SecSi™ (Secured Silicon) Sector
provides a 128-word/256-byte area for
code or data that can be permanently protected. Once this sector is protected,
no further changes within the sector can occur.
Spansion MirrorBit flash technology combines years of Flash memory manufac-
turing experience to produce the highest levels of quality, reliability and cost
effectiveness. The device electrically erases all bits within a sector simultaneously
via hot-hole assisted erase. The data is programmed using hot electron injection.
January 29, 2004 S29GLxxxMA0
S29GLxxxM MirrorBit
TM
Flash Family
3
Table of Contents
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .6
S29GL256M .............................................................................................................6
S29GL128M ..............................................................................................................6
S29GL064M .............................................................................................................6
S29GL032M .............................................................................................................6
Table 16. S29GL032M (Model R1) Top Boot Sector Protection ..79
Table 17. S29GL032M (Model R2) Bottom Boot
Sector Protection ...............................................................80
Table 18. S29GL032M (Models R3, R4) Sector Group Protection/Un-
protection Address Table ....................................................81
Table 19. S29GL065M (Model R0) Sector Group Protection/Unpro-
tection Address Table ........................................................82
Table 20. S29GL064M (Model R1) Top Boot Sector Protection ..83
Table 21. S29GL064M (Model R2) Bottom Boot
Sector Protection ...............................................................84
Table 22. S29GL064M (Model R3, R4) Sector Group Protection/Un-
protection Address Table ....................................................85
Table 23. S29GL064M (Model R5) Sector Group Protection/Unpro-
tection Address Table ........................................................86
Table 24. S29GL064M (Models R6, R7) Sector Group Protection/Un-
protection Address Table ....................................................87
Table 25. S29GL128M Sector Group Protection/Unprotection
Address Table ....................................................................87
Table 26. S29GL256M Sector Group Protection/Unprotection
Address Table ....................................................................89
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .8
Special Package Handling Instructions ...........................................................13
Special Package Handling Instructions .......................................................... 14
Logic Symbol-S29GL032M (Model R0) ......................................................... 16
Logic Symbol-S29GL032M (Models R1, R2) ................................................. 16
Logic Symbol-S29GL032M (Models R3, R4) ................................................ 16
Logic Symbol-S29GL064M (Model R0) .........................................................17
Logic Symbol-S29GL064M (Models R1, R2) .................................................17
Logic Symbol-S29GL064M (Models R3, R4) ................................................17
Logic Symbol-S29GL064M (Model R5) ......................................................... 18
Logic Symbol-S29GL064M (Model R6, R7) ................................................. 18
Logic Symbol-S29GL128M ................................................................................. 18
Logic Symbol-S29GL256M ................................................................................ 19
Ordering Information-S29GL032M . . . . . . . . . . . .20
S29GL032M Standard Products ..................................................................... 20
Temporary Sector Group Unprotect .......................................................... 93
Figure 1. Temporary Sector Group Unprotect Operation .......... 93
Figure 2. In-System Sector Group
Protect/Unprotect Algorithms............................................... 94
Ordering Information-S29GL064M . . . . . . . . . . . . 22
S29GL064M Standard Products ..................................................................... 22
Ordering Information-S29GL128M . . . . . . . . . . . .24
S29GL128M Standard Products ...................................................................... 24
Ordering Information-S29GL256M . . . . . . . . . . . . 25
S29GL256M Standard Products ......................................................................25
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .26
Table 1. Device Bus Operations ........................................... 26
Word/Byte Configuration ............................................................................... 26
Requirements for Reading Array Data ........................................................ 26
Page Mode Read ..............................................................................................27
Writing Commands/Command Sequences .................................................27
Write Buffer .....................................................................................................27
Accelerated Program Operation ...............................................................27
Autoselect Functions .................................................................................... 28
Standby Mode ...................................................................................................... 28
Automatic Sleep Mode ..................................................................................... 28
RESET#: Hardware Reset Pin ........................................................................ 28
Output Disable Mode ....................................................................................... 29
Table 2. S29GL032M (Model R0) Sector Address Table ........... 30
Table 3. S29GL032M (Models R1, R2) Sector Address Table .... 32
Table 4. S29GL032M (Model R3) Top Boot Sector Architecture 34
Table 5. S29GL032M (Model R4) Bottom Boot Sector Architecture
36
Table 6. S29GL064M (Model R0) Sector Address Table ........... 38
Table 7. S29GL064M (Models R1, R2) Sector Address Table .... 42
Table 8. S29GL064M (Model R3) Top Boot Sector Architecture 46
Table 9. S29GL064M (Model R4) Bottom Boot Sector Architecture
50
Table 10. S29GL064M (Model R5) Sector Address Table ......... 53
Table 11. S29GL064M (Models R6, R7) Sector Address Table .. 56
Table 12. S29GL128M Sector Address Table ......................... 60
Table 13. S29GL256M Sector Address Table ......................... 66
SecSi (Secured Silicon) Sector Flash Memory Region ............................. 95
Write Protect (WP#) ....................................................................................... 96
Hardware Data Protection ............................................................................. 96
Low VCC Write Inhibit ............................................................................... 96
Write Pulse “Glitch” Protection ............................................................... 97
Logical Inhibit ................................................................................................... 97
Power-Up Write Inhibit ............................................................................... 97
Common Flash Memory Interface (CFI) . . . . . . . 97
Table 28. System Interface String........................................ 98
Command Definitions . . . . . . . . . . . . . . . . . . . . . 101
Reading Array Data ...........................................................................................101
Reset Command .................................................................................................101
Autoselect Command Sequence ..................................................................102
Enter SecSi Sector/Exit SecSi Sector Command Sequence ..................102
Write Buffer Programming ........................................................................102
Accelerated Program ...................................................................................104
Figure 3. Write Buffer Programming Operation..................... 105
Program Suspend/Program Resume Command Sequence ...................106
Figure 4. Program Suspend/Program Resume ...................... 107
Chip Erase Command Sequence ..................................................................107
Sector Erase Command Sequence .............................................................. 108
Figure 5. Erase Operation ................................................. 109
Erase Suspend/Erase Resume Commands .................................................109
Command Definitions ........................................................................................ 111
Write Operation Status ................................................................................... 113
DQ7: Data# Polling ........................................................................................... 113
Table 31. Command Definitions (x16 Mode, BYTE# = V
IH
) .... 111
Table 32. Command Definitions (x8 Mode, BYTE# = V
IL
)....... 112
Figure 6. Data# Polling Algorithm ...................................... 114
RY/BY#: Ready/Busy# .......................................................................................114
DQ6: Toggle Bit I ...............................................................................................115
Figure 7. Toggle Bit Algorithm ........................................... 116
Autoselect Mode .................................................................................................77
Table 14. Autoselect Codes, (High Voltage Method) .............. 78
Sector Group Protection and Unprotection ............................................. 78
Table 15. S29GL032M (Model R0) Sector Group Protection/Unpro-
tection Address Table ........................................................ 79
DQ2: Toggle Bit II ..............................................................................................116
Reading Toggle Bits DQ6/DQ2 .....................................................................117
DQ5: Exceeded Timing Limits ........................................................................117
DQ3: Sector Erase Timer ................................................................................117
January 29, 2004 S29GLxxxMA0
S29GLxxxM MirrorBitTM Flash Family
4
DQ1: Write-to-Buffer Abort ..........................................................................118
Table 33. Write Operation Status ........................................118
Figure 8. Maximum Negative Overshoot Waveform ............... 119
Figure 9. Maximum Positive
Overshoot Waveform ........................................................ 119
Figure 18. Data# Polling Timings
(During Embedded Algorithms).......................................... 132
Figure 19. Toggle Bit Timings (During Embedded Algorithms) 133
Figure 20. DQ2 vs. DQ6.................................................... 133
Temporary Sector Unprotect ....................................................................... 134
Figure 21. Temporary Sector Group Unprotect Timing Diagram 134
Figure 22. Sector Group Protect and Unprotect Timing Diagram 135
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 119
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 120
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Figure 10. Test Setup ....................................................... 121
Table 34. Test Specifications
............................................. 121
Key to Switching Waveforms . . . . . . . . . . . . . . . 121
Figure 11. Input Waveforms and
Measurement Levels ......................................................... 121
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 122
Read-Only Operations-S29GL256M only .................................................. 122
Read-Only Operations-S29GL128M only ................................................... 122
Read-Only Operations-S29GL064M only .................................................. 123
Read-Only Operations-S29GL032M only .................................................. 123
Figure 12. Read Operation Timings ..................................... 124
Figure 13. Page Read Timings ............................................ 124
Alternate CE# Controlled Erase and Program Operations-
S29GL256M ......................................................................................................... 136
Alternate CE# Controlled Erase and Program Operations-
S29GL128M .......................................................................................................... 137
Alternate CE# Controlled Erase and Program Operations-
S29GL064M .........................................................................................................138
Alternate CE# Controlled Erase and Program Operations-
S29GL032M ......................................................................................................... 139
Figure 23. Alternate CE# Controlled Write (Erase/Program)
Operation Timings............................................................ 140
Erase And Programming Performance . . . . . . . . 141
Latchup Characteristics . . . . . . . . . . . . . . . . . . . 141
TSOP Pin and BGA Package Capacitance . . . . 142
For package types TA, TF, BA, BF, FA, FF
(refer to Ordering Information Pages): ..................................................142
For package types TB, TC, BB, BC
(refer to Ordering Information Pages): ..................................................142
Hardware Reset (RESET#) ............................................................................. 125
Figure 14. Reset Timings................................................... 125
Erase and Program Operations-S29GL256M only .................................. 126
Erase and Program Operations-S29GL128M only ................................... 127
Erase and Program Operations-S29GL064M only ..................................128
Erase and Program Operations-S29GL032M only .................................. 129
Figure 15. Program Operation Timings ................................ 130
Figure 16. Accelerated Program Timing Diagram .................. 130
Figure 17. Chip/Sector Erase Operation Timings ................... 131
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . .143
January 29, 2004 S29GLxxxMA0
S29GLxxxM MirrorBitTM Flash Family
5
Embedded System
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