ZL50232QCG1 datasheet, PDF - EEWORLD Datasheet

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ZL50232QCG1: DescriptionISDN Echo Canceller, 1-Func, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026BED, LQFP-100; CategoryWireless rf/communication Telecom circuit; File Size653KB，44 Pages; ManufacturerZarlink Semiconductor (Microsemi); Websitehttp://www.zarlink.com/; Environmental Compliance

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ZL50232QCG1 Overview

ISDN Echo Canceller, 1-Func, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026BED, LQFP-100

ZL50232QCG1 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Zarlink Semiconductor (Microsemi)
Objectid	2091980538
package instruction	LFQFP, QFP100,.63SQ,20
Reach Compliance Code	compliant
compound_id	217301982
JESD-30 code	S-PQFP-G100
JESD-609 code	e3
length	14 mm
Humidity sensitivity level	3
Number of functions	1
Number of terminals	100
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP100,.63SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
power supply	1.8,3.3 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum slew rate	0.00025 mA
Nominal supply voltage	1.8 V
surface mount	YES
Telecom integrated circuit types	ISDN ECHO CANCELLER
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	14 mm

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ZL50232

32 Channel Voice Echo Canceller

Data Sheet

Features

•

Independent multiple channels of echo

cancellation; from 32 channels of 64 ms to 16

channels of 128 ms with the ability to mix

channels at 128 ms or 64 ms in any combination

Independent Power Down mode for each group

of 2 channels for power management

Fully compliant to ITU-T G.165, G.168 (2000) and

(2002) specifications

Passed all AT&T voice quality tests for carrier

grade echo canceller.

Compatible to ST-BUS and GCI interface at

2 Mbps serial PCM

PCM coding,

µ/A-Law

ITU-T G.711 or sign

magnitude

Per channel Fax/Modem G.164 2100 Hz or G.165

2100 Hz phase reversal Tone Disable

Per channel echo canceller parameters control

Transparent data transfer and mute

Fast reconvergence on echo path changes

Fully programmable convergence speeds

Patented Advanced Non-Linear Processor with

high quality subjective performance

Protection against narrow band signal

divergence and instability in high echo

environments

Ordering Information

ZL50232/QCC

ZL50232/GDC

ZL50232QCG1

ZL50232GDG2

100 Pin LQFP Trays

208 Ball PBGA Trays

100 Pin LQFP* Trays, Bake & Drypack

208 Ball PBGA**Trays

*Pb Free Matte Tin

**Pb Free Tin/Silver/Copper

-40°C to +85°C

March 2006

•

+9 dB to -12 dB level adjusters (3 dB steps) at all

signal ports

Offset nulling of all PCM channels

10 MHz or 20 MHz master clock operation

3.3 V pads and 1.8 V Logic core operation with

5 V tolerant inputs

IEEE-1149.1 (JTAG) Test Access Port

Applications

•

Voice over IP network gateways

Voice over ATM, Frame Relay

T1/E1/J1 multichannel echo cancellation

Wireless base stations

Echo Canceller pools

DCME, satellite and multiplexer system

DD1 (3.3V)

DD2 (1.8 V)

ODE

Echo Canceller Pool

Rin

Sin

MCLK

Fsel

PLL

Serial

Parallel

Group 0

ECA/ECB

Group 1

ECA/ECB

Group 2

ECA/ECB

Group 3

ECA/ECB

Parallel

Serial

Rout

Sout

Group 4

ECA/ECB

Group 5

ECA/ECB

Group 6

ECA/ECB

Group 7

ECA/ECB

Group 8

ECA/ECB

Group 9

ECA/ECB

Group 10

ECA/ECB

Group 11

ECA/ECB

Group 12

ECA/ECB

C4i

F0i

Timing

Unit

Group 13

ECA/ECB

Group 14

ECA/ECB

Group 15

ECA/ECB

Note:

Refer to Figure 4

for Echo Canceller

block diagram

IC0

RESET

Microprocessor Interface

Test Port

DS CS R/W A10-A0 DTA

D7-D0

IRQ TMS TDI TDO TCK TRST

Figure 1 - ZL50232 Device Overview

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

ZL50232

Table of Contents

Data Sheet

1.0 Change Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.0 Device Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.1 Adaptive Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2 Double-Talk Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.3 Path Change Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.4 Non-Linear Processor (NLP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.5 Disable Tone Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.6 Instability Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.7 Narrow Band Signal Detector (NBSD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.8 Offset Null Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.9 Adjustable Level Pads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.10 ITU-T G.168 Compliance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.0 Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1 Normal Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.2 Back-to-Back Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.3 Extended Delay Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.0 Echo Canceller Functional States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.1 Mute. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.2 Bypass. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.3 Disable Adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.4 Enable Adaptation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.0 ZL50232 Throughput Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.0 Serial PCM I/O channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.1 Serial Data Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7.0 Memory Mapped Control and Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7.1 Normal Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7.2 Extended Delay Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7.3 Back-to-Back Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

7.4 Power Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

7.5 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

7.6 Call Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

7.7 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

8.0 JTAG Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

8.1 Test Access Port (TAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

8.2 Instruction Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

8.3 Test Data Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Zarlink Semiconductor Inc.

ZL50232

List of Figures

Data Sheet

Figure 1 - ZL50232 Device Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2 - 100 Pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Figure 3 - 208 Ball LBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Figure 4 - Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 5 - Disable Tone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6 -

Normal Device Configuration (64 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 7 -

Back-to-Back Device Configuration (64 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8 -

Extended Delay Configuration (128 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 9 - ST-BUS and GCI Interface Channel Assignment for 2 Mbps Data Streams . . . . . . . . . . . . . . . . . . . . . 18

Figure 10 - Memory Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 11 - Power Up Sequence Flow Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 12 - ST-BUS Timing at 2.048 Mbps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 13 - GCI Interface Timing at 2.048 Mbps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 14 - Output Driver Enable (ODE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 15 - Master Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 16 - Motorola Non-Multiplexed Bus Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 17 - The MU Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Zarlink Semiconductor Inc.

ZL50232QCG1 Related Products

	ZL50232QCG1	ZL50232GDG2	ZL50232/GDC
Description	ISDN Echo Canceller, 1-Func, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026BED, LQFP-100	ISDN Echo Canceller, 1-Func, PBGA208, 17 X 17 MM, 1.30 MM HEIGHT, LEAD FREE, MO-192, LBGA-208	ISDN Echo Canceller, 1-Func, PBGA208, 17 X 17 MM, 1.30 MM HEIGHT, MO-192, LBGA-208
Maker	Zarlink Semiconductor (Microsemi)	Zarlink Semiconductor (Microsemi)	Zarlink Semiconductor (Microsemi)
package instruction	LFQFP, QFP100,.63SQ,20	LBGA, BGA208,16X16,40	LBGA, BGA208,16X16,40
Reach Compliance Code	compliant	compliant	unknown
JESD-30 code	S-PQFP-G100	S-PBGA-B208	S-PBGA-B208
JESD-609 code	e3	e1	e0
length	14 mm	17 mm	17 mm
Number of functions	1	1	1
Number of terminals	100	208	208
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFQFP	LBGA	LBGA
Encapsulate equivalent code	QFP100,.63SQ,20	BGA208,16X16,40	BGA208,16X16,40
Package shape	SQUARE	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE
power supply	1.8,3.3 V	1.8,3.3 V	1.8,3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	1.5 mm	1.5 mm
Maximum slew rate	0.00025 mA	0.00025 mA	0.00025 mA
Nominal supply voltage	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES
Telecom integrated circuit types	ISDN ECHO CANCELLER	ISDN ECHO CANCELLER	ISDN ECHO CANCELLER
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	MATTE TIN	TIN SILVER COPPER	TIN LEAD
Terminal form	GULL WING	BALL	BALL
Terminal pitch	0.5 mm	1 mm	1 mm
Terminal location	QUAD	BOTTOM	BOTTOM
width	14 mm	17 mm	17 mm
Is it Rohs certified?	conform to	conform to	-
Peak Reflow Temperature (Celsius)	260	NOT SPECIFIED	-
Maximum time at peak reflow temperature	30	NOT SPECIFIED	-

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