K8P5615UQA
NOR FLASH MEMORY
256Mb A-die Page NOR Specification
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AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
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* Samsung Electronics reserves the right to change products or specification without notice.
1
Revision 1.1
July 2007
K8P5615UQA
NOR FLASH MEMORY
Document Title
256M Bit (16M x16) Page Mode / Multi-Bank NOR Flash Memory
Revision History
Revision No. History
0.0
0.1
Initial draft
Change Vih Min. from 2.0 to Vcc x0.8
Change Vil Max. from 0.8V to Vcc x 0.2
Change Isb Max from 40uA to 55uA
MCP Product Voltage Information is added
TSOP1 description is added in Ordering Information
Package Demension Information is added
Change Isb2 Max. from 40uA to 55uA
Change Isb3 Max. from 40uA to 55uA
Specification is finalized
Change Isb1 Max. from 55uA to 60uA
Change Isb2 Max. from 55uA to 60uA
Change Isb3 Max. from 55uA to 60uA
Draft Date
October 02, 2006
October 25, 2006
Remark
Target
Information
Target
Information
0.2
0.3
0.4
0.5
November 06, 2006 Target
Information
November 13,2006 Target
Information
November 19, 2006 Target
Information
Target
January 11, 2007
Information
May 08, 2007
July 27, 2007
1.0
1.1
2
Revision 1.1
July 2007
K8P5615UQA
NOR FLASH MEMORY
256M Bit (16M x16) Page Mode / Multi-Bank NOR Flash Memory
FEATURES
•
Single Voltage, 2.7V to 3.6V for Read and Write operations
Voltage range of 2.7V to 3.1V valid for MCP product
•
Organization
16M x16 bit (Word mode Only)
•
Fast Read Access Time : 70ns
•
Page Mode Operation
8 Words Page access allows fast asychronous read
Page Read Access Time : 30ns
•
Read While Program/Erase Operation
•
Multiple Bank architectures (4 banks)
Bank 0: 32Mbit (32Kw x 4 and 128Kw x 15)
Bank 1: 96Mbit (128Kw x 48)
Bank 2: 96Mbit (128Kw x 48)
Bank 3: 32Mbit (32Kw x 4 and 128Kw x 15)
•
OTP Block : Extra 256 word
- 128word for factory and 128word for customer OTP
•
Power Consumption (typical value)
- Active Read Current : 30mA (@5MHz)
- Program/Erase Current : 25mA
- Read While Program or Read While Erase Current : 65mA
- Standby Mode/Auto Sleep Mode : 20uA
•
Support Single & 32word Buffer Program
•
WP/ACC input pin
- Allows special protection of two outermost boot blocks on both
ends of flash array at V
IL
, regardless of block protect status
- Removes special protection at V
IH,
the two outermost blocks on
both ends of flash array return to normal block protect status
- Reduce program time at V
HH
: 6us/word at Write Buffer
•
Erase Suspend/Resume
•
Program Suspend/Resume
•
Unlock Bypass Program
•
Hardware RESET Pin
•
Command Register Operation
•
Supports Common Flash Memory Interface
•
Industrial Temperature : -40°C to 85°C
•
Extended Temperature : -25°C to 85°C
•
Endurance : 100,000 Program/Erase Cycles Minimum
•
Data Retention : 10 years
•
Package options
- 84 Ball Fine-pitch BGA (11.6x8mm)
- 56 Pin TSOP (20x14mm)
GENERAL DESCRIPTION
The K8P5615UQA featuring single 3.0V power supply, is an
256Mbit NOR-type Flash Memory organized as 16M x16. The
memory architecture of the device is designed to divide its
memory arrays into 134 blocks with independent hardware pro-
tection. This block architecture provides highly flexible erase
and program capability. The K8P5615UQA NOR Flash consists
of four banks. This device is capable of reading data from one
bank while programming or erasing in the other banks.
The K8P5615UQA offers fast page access time of 30ns with
random access time of 70ns. The device′s fast access times
allow high speed microprocessors to operate without wait
states. The device performs a program operation in unit of 16
bits (Word) and erases in units of a block. Single or multiple
blocks can be erased. The block erase operation is completed
within typically 1.6 sec. The device requires 15mA as program/
erase current in the commercial and extended temperature
ranges.
The K8P5615UQA NOR Flash Memory is created by using
Samsung's advanced CMOS process technology. This device is
available in 84 Ball FBGA and 56 Pin TSOP. The device is com-
patible with EPROM applications to require high-density and
cost-effective nonvolatile read/write storage solutions.
PIN DESCRIPTION
Pin Name
A0 - A23
DQ0 - DQ15
CE
OE
RESET
RY/BY
WE
WP/ACC
Vcc
V
SS
NC
Address Inputs
Data Inputs / Outputs
Chip Enable
Output Enable
Hardware Reset Pin
Ready/Busy Output
Write Enable
Hardware Write Protection/Program Acceleration
Power Supply
Ground
No Connection
Pin Function
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
3
Revision 1.1
July 2007
Microchip MCU
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