PAL22V10G-7PC datasheet, PDF - EEWORLD Datasheet

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PAL22V10G-7PC: DescriptionOT PLD, 7.5ns, PAL-Type, BICMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24; CategoryProgrammable logic devices Programmable logic; File Size304KB，10 Pages; ManufacturerCypress Semiconductor

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PAL22V10G-7PC Overview

OT PLD, 7.5ns, PAL-Type, BICMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24

PAL22V10G-7PC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	DIP
package instruction	DIP, DIP24,.3
Contacts	24
Reach Compliance Code	compliant
Other features	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
Architecture	PAL-TYPE
maximum clock frequency	111 MHz
JESD-30 code	R-PDIP-T24
JESD-609 code	e0
length	30.099 mm
Humidity sensitivity level	1
Dedicated input times	11
Number of I/O lines	10
Number of entries	22
Output times	10
Number of product terms	132
Number of terminals	24
Maximum operating temperature	70 °C
Minimum operating temperature
organize	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	OT PLD
propagation delay	7.5 ns
Certification status	Not Qualified
Maximum seat height	4.826 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	BICMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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PAL22V10G-7PC Related Products

	PAL22V10G-7PC	PAL22VP10G-10PC
Description	OT PLD, 7.5ns, PAL-Type, BICMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24	OT PLD, 10ns, PAL-Type, BICMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24
Is it Rohs certified?	incompatible	incompatible
Maker	Cypress Semiconductor	Cypress Semiconductor
Parts packaging code	DIP	DIP
package instruction	DIP, DIP24,.3	DIP, DIP24,.3
Contacts	24	24
Reach Compliance Code	compliant	compliant
Other features	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
Architecture	PAL-TYPE	PAL-TYPE
maximum clock frequency	111 MHz	90 MHz
JESD-30 code	R-PDIP-T24	R-PDIP-T24
JESD-609 code	e0	e0
length	30.099 mm	30.099 mm
Humidity sensitivity level	1	1
Dedicated input times	11	11
Number of I/O lines	10	10
Number of entries	22	22
Output times	10	10
Number of product terms	132	132
Number of terminals	24	24
Maximum operating temperature	70 °C	70 °C
organize	11 DEDICATED INPUTS, 10 I/O	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL	MACROCELL
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	DIP
Encapsulate equivalent code	DIP24,.3	DIP24,.3
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V
Programmable logic type	OT PLD	OT PLD
propagation delay	7.5 ns	10 ns
Certification status	Not Qualified	Not Qualified
Maximum seat height	4.826 mm	4.826 mm
Maximum supply voltage	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V
surface mount	NO	NO
technology	BICMOS	BICMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	7.62 mm	7.62 mm

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