Freescale Semiconductor
Product Brief
Document Number: PXS20PB
Rev. 1, June 2011
PXS20 Product Brief
32-bit Power Architecture
®
Microcontrollers for Highly
Reliable and Safe Operation Across a Range of Industrial,
Medical, and Transportation Safety Critical Applications
Contents
The PXS20 series microcontrollers are system-on-chip
devices that are built on Power Architecture
®
technology, are 100% user-mode compatible with the
classic Power Architecture
®
instruction set, contain
enhancements that improve the architecture’s fit in
embedded applications, include additional instruction
support for digital signal processing (DSP), and integrate
technologies to support highly reliable and safe
operation across a range of industrial, medical and
transportation safety critical applications. These
microcontrollers include a rich set of peripherals for
complex real time control, such as an enhanced timer
unit, analog-to-digital converters, and multiple serial
communications modules.
The PXS20 is designed for applications requiring a high
Safety Integrity Level (SIL).
All devices in this family are built around a dual core
safety platform with an innovative safety concept that
reduces system cost and effort for the customer to
achieve IEC61511 or IEC61508 certification of their
1
2
3
4
5
Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.1 PXS20 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . 6
2.4 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.5 Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Developer Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Orderable Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
© Freescale Semiconductor, Inc., 2011. All rights reserved.
Application Examples
system. In order to minimize software overhead and improve operational reliability, all major systems such
as CPU core, DMA controller, interrupt controller, crossbar bus system, memory systems, peripheral
systems, and memory protection unit, include built in redundancy and or robust system monitoring. Lock
Step Redundancy Checking Units are implemented at each output of this Sphere of Replication (SoR).
ECC is available for on-chip RAM and flash memories. A programmable fault collection and control unit
monitors the integrity status of the device and provides flexible safe state control.
The host processor core of the PXS20 is the latest CPU from the e200 family of compatible Power
Architecture
®
cores. The e200z4d 5-stage pipeline dual issue core provides a very high level of efficiency,
allowing high performance with minimum power consumption.
The peripheral set provides high-end electrical motor control capability with very low CPU intervention,
thanks to the on-chip Cross Triggering Unit (CTU).
This device incorporates high-performance 90 nm embedded flash-memory technology to provide sub-
stantial cost reduction per feature and significant performance improvement.
1
Application Examples
The PXS20 can be used for a variety of safety applications such as:
• Safety shutdown systems
• Solar inverters
• Motor drives
• Factory automation
• Aerospace
• Robotics
2
Features
This section describes the features of the PXS20 family.
PXS20 Product Brief, Rev. 1
2
Freescale Semiconductor
Features
2.1
PXS20 Features
Table 1. PXS20 Family Feature Set
Feature
CPU
Type
Architecture
Execution speed
DMIPS intrinsic performance
SIMD (DSP + FPU)
MMU
Instruction set PPC
Instruction set VLE
Instruction cache
MPU-16 regions
Semaphore unit (SEMA4)
Buses
Core bus
Internal periphery bus
Crossbar
Memory
Master × slave ports
Code/data flash
Static RAM (SRAM)
Modules
Interrupt controller (INTC)
Periodic Interrupt Timer (PIT)
System timer module (STM)
Software watchdog timer (SWT)
eDMA
FlexRay
CAN
UART with DMA support
Clock out
Fault control & collection unit (FCCU)
Cross triggering unit (CTU)
eTimer
PWM
Analog-to-digital converter (ADC)
PXS20
2 × e200z4
(in lock-step or decoupled operation)
Harvard
0 – 120 MHz (+2% FM)
> 240 MIPS
Yes
16 entry
Yes
Yes
4 KB, EDC
Yes, replicated module
Yes
AHB, 32-bit address, 64-bit data
32-bit address, 32-bit data
Lock Step Mode: 4 × 3
Decoupled Parallel Mode: 6 × 3
1 MB, ECC, RWW
128 KB, ECC
16 interrupt levels, replicated module
1 × 4 channels
1 × 4 channels, replicated module
Yes, replicated module
16 channels, replicated module
1 × 64 message buffers, dual channel
2 × 32 message buffers
2
Yes
Yes
Yes
3 × 6 channels
2 Module 4 × (2 + 1) channels
2 × 12-bit ADC, 16 channels per ADC
(3 internal, 4 shared and 9 external)
Table 1
displays the PXS20 feature set.
PXS20 Product Brief, Rev. 1
Freescale Semiconductor
3
Features
Table 1. PXS20 Family Feature Set (continued)
Feature
Modules
(cont.)
Sine-wave generator (SWG)
Serial peripheral interface (SPI)
Cyclic redundancy checker (CRC) unit
Junction temperature sensor (TSENS)
Digital I/Os
Supply
Device power supply
Analog reference voltage
Clocking
Frequency-modulated phase-locked loop (FMPLL)
Internal RC oscillator
External crystal oscillator
Debug
Packages
Temperature
Nexus
Type
Temperature range (junction)
Ambient temperature range using external ballast
transistor (LQFP)
Ambient temperature range using external ballast
transistor (BGA)
PXS20
32 point
3 × SPI
as many as 8 chip selects
Yes
Yes, replicated module
16
3.3 V with integrated bypassable ballast transistor
External ballast transistor not needed for bare die
3.0 V – 3.6 V and 4.5 V – 5.5 V
2
16 MHz
4 – 40 MHz
Level 3+
144 LQFP
257 MAPBGA
–40 to 150
°
C
–40 to 125
°
C
TBD
2.2
Block Diagram
Figure 1
and
Figure 2
show the block diagram of the PXS20 microcontrollers.
PXS20 Product Brief, Rev. 1
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Freescale Semiconductor
Features
PXS20 Block Diagram
Debug
PMU
e200z4
SWT
ECSM
STM
INTC
eDMA
FPU
VLE
MMU
I-Cache
FlexRay™
Redundancy
Checker
Nexus
SPE2
VLE
MMU
Cache
JTAG
e200z4
SWT
ECSM
STM
INTC
eDMA
PMU
Crossbar Switch (XBAR)
Memory Protection Unit (MPU)
Crossbar Switch (XBAR)
Memory Protection Unit (MPU)
PBRIDGE
Redundancy Checker
1 MB Flash (ECC)
Redundancy Checker
128 KB SRAM (ECC)
PBRIDGE
Redundancy Checker
IRCOSC
TSENS
TSENS
FMPLL
FMPLL
SSCM
CMU
CMU
CMU
BAM
CRC
PIT
SPI
SPI
SPI
UART/LIN
UART/LIN
eTIMER
eTIMER
eTIMER
WKPU
XOSC
Figure 1. PXS20 block diagram
PXS20 Product Brief, Rev. 1
Freescale Semiconductor
5
FCCU
PWM
PWM
BAM
CAN
ADC
ADC
CAN
CTU
SIU
PIT
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