Freescale Semiconductor
Data Sheet: Technical Data
Document Number: PXD10
Rev. 1, 09/2011
PXD10
416 TEPBGA
27 mm x 27 mm
208 LQFP
28 mm x 28 mm
PXD10 Microcontroller Data
Sheet
The PXD10 family represents a new generation of
32-bit microcontrollers based on the Power
Architecture
®
. These devices provide a
cost-effective, single chip display solution for the
industrial market. An integrated TFT driver with
digital video input ability from an external video
source, significant on-chip memory, and low power
design methodologies provide flexibility and
reliability in meeting display demands in rugged
environments. The advanced processor core offers
high performance processing optimized for low
power consumption, operating at speeds as high as
64 MHz. The family itself is fully scalable from
512 KB to 1 MB internal flash memory. The
memory capacity can be further expanded via the
on-chip QuadSPI serial flash controller module.
The PXD10 family platform has a single level of
memory hierarchy supporting on-chip SRAM and
flash memories. The 1 MB flash version features
160 KB of on-chip graphics SRAM to buffer cost
effective color TFT displays driven via the on-chip
Display Control Unit (DCU). See
Table 1
for
specific memory size and feature sets of the product
family members.
The PXD10 family benefits from the extensive
development infrastructure for Power Architecture
devices, which is already well established. This
includes full support from available software
drivers, operating systems, and configuration code
to assist with users’ implementations. See
Section 3, Developer support,
for more
information.
1
176 LQFP
24 mm x 24 mm
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1 Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.4 PXD10 series blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.5 PXD10 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.6 Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pinout and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . 27
2.1 144 LQFP package pinouts . . . . . . . . . . . . . . . . . . . . . 27
2.2 176 LQFP package pinout . . . . . . . . . . . . . . . . . . . . . . 29
2.3 Pad configuration during reset phases . . . . . . . . . . . . . 30
2.4 Voltage supply pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.5 Pad types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.6 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.7 Debug pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.8 Port pin summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.2 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . 55
3.3 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
3.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . 57
3.5 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . 62
3.6 Electromagnetic compatibility (EMC) characteristics . . 65
3.7 Power management electrical characteristics . . . . . . . 67
3.8 I/O pad electrical characteristics . . . . . . . . . . . . . . . . . 75
3.9 SSD specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
3.10 RESET electrical characteristics . . . . . . . . . . . . . . . . . 84
3.11 Fast external crystal oscillator (4–16 MHz) electrical characteristics87
3.12 Slow external crystal oscillator (32 KHz) electrical characteristics89
3.13 FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . 91
3.14 Fast internal RC oscillator (16 MHz) electrical characteristics 92
3.15 Slow internal RC oscillator (128 kHz) electrical characteristics92
3.16 Flash memory electrical characteristics . . . . . . . . . . . . 93
3.17 ADC electrical characteristics. . . . . . . . . . . . . . . . . . . . 94
3.18 LCD driver electrical characteristics . . . . . . . . . . . . . . 101
3.19 Pad AC specifications. . . . . . . . . . . . . . . . . . . . . . . . . 102
3.20 AC timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . 122
4.1 144 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
4.2 176 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
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© Freescale Semiconductor, Inc., 2011. All rights reserved.
Overview
1
1.1
Overview
Document overview
This document describes the device features and highlights important electrical and physical
characteristics. For functional characteristics, see the
PXD10 Microcontroller Reference Manual.
1.2
Description
The PXD10 family of chips is designed to enable the development of industrial HMI applications by
providing a single-chip solution capable of hosting real-time applications and driving a TFT display
directly using an on-chip color TFT display controller.
PXD10 chips incorporate a cost-efficient host processor core compliant with the Power Architecture
®
embedded category. The processor is 100% user-mode compatible with the Power Architecture and
capitalizes on the available development infrastructure of current Power Architecture devices with full
support from available software drivers, operating systems and configuration code to assist with users'
implementations.
Offering high performance processing at speeds up to 64 MHz, the PXD10 family is optimized for low
power consumption and supports a range of on-chip SRAM and internal flash memory sizes. The version
with 1 MB of flash memory (PXD1010) features 160 KB of on-chip graphics SRAM.
See
Table 1
for specific memory and feature sets of the product family members.
1.3
Device comparison
Table 1. PXD10 family feature set
Feature
CPU
Execution speed
Flash (ECC)
EEPROM Emulation Block (ECC)
RAM (ECC)
Graphics RAM
MPU
eDMA
Display Control Unit (DCU)
Parallel Data Interface
Stepper Motor Controller (SMC)
Stepper Stall Detect (SSD)
Sound Generation Logic (SGL)
No
No
6 motors
Yes
Yes
No
12 entry
16 channels
Yes
Yes
512 KB
4 × 16 KB
48 KB
160 KB
PXD1005
e200z0h
Static – 64 MHz
1 MB
PXD1010
PXD10 Microcontroller Data Sheet, Rev. 1
2
Freescale Semiconductor
Overview
Table 1. PXD10 family feature set (continued)
Feature
LCD driver
32 kHz slow external crystal oscillator
Real-Time Counter and Autonomous Periodic
Interrupt
Periodic Interrupt Timer (PIT)
Software Watchdog Timer (SWT)
System Timer Module (STM)
Timed I/O (eMIOS)
PXD1005
64 × 6
Yes
Yes
4 ch, 32-bit
Yes
4 ch, 32-bit
8 ch, 16-bit IC/OC
16 ch, 16-bit PWM/IC/OC
ADC
CAN (64 Mailboxes)
CAN Sampler
SCI
SPI
QuadSPI Serial Flash Interface
I
2
C
GPIO
Debug
Package
2 × SPI
No
2
105
Nexus 1
144 LQFP
16 channels, 10-bit
2 × CAN
Yes
2 × UART
3 × SPI
Yes
4
105 (144-pin package)
133 (176-pin package)
Nexus 2+
144 LQFP
176 LQFP
PXD1010
40 × 4, 38 × 6
PXD10 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
3
Overview
1.4
1.4.1
PXD10 series blocks
Block diagram
Figure 1
shows a high-level block diagram of the PXD10 series.
PXD10 Block Diagram
e200z0 Core
Integer
Execution
Unit
Multiply
Unit
Instruction
Unit
VLE
Instruction Bus
General
Purpose
Registers
(32 x 32-bit)
Branch
Unit
Load/Store
Unit
Data Bus
Crossbar Switch (XBAR)
Memory Protection Unit (MPU)
Oscillators
BAM
INTC
RTC
PLL
PIT
SWT
Aux PLL
VREG
STM
JTAG
Nexus2+
eDMA
Display
Control
Unit
(TFTs)
Flash Controller
RAM
Controller
Peripheral I/O Bridge (PBRIDGE)
RAM
Controller
QuadSPI
UART/LIN
Flash
(ECC)
Flash
(ECC)
EEPROM
(Emulation)
Graphics
SRAM
ADC
LCD Seg
SPI
I
2
C
eMIOS
CAN
SIU
SMD SSD
SRAM
(ECC)
ADC
BAM
CAN
ECC
eDMA
eMIOS
I
2
C
INTC
JTAG
LCD
PIT
PLL
– Analog-to-digital converter
– Boot assist module
– Controller area network controller
– Error correction code
– Enhanced direct memory access controller
– Timed input/output
– Inter-integrated circuit controller
– Interrupt controller
– Joint Test Action Group interface
– Liquid crystal display
– Periodic interrupt timer
– Phase-locked loop
RTC
SIU
SMD SSD
SPI
SRAM
STM
SWT
UART/LIN
VLE
VREG
– Real time clock
– System integration unit
– Stepper motor driver/stepper stall detect
– Serial peripheral interface controller
– Static random-access memory
– System timer module
– Software watchdog timer
– Universal asynchronous receiver/transmitter/
local interconnect network
– Variable-length execution set
– Voltage regulator
Figure 1. PXD10 series block diagram
PXD10 Microcontroller Data Sheet, Rev. 1
4
Freescale Semiconductor
Overview
1.5
1.5.1
•
PXD10 features
Summary
Single issue, 32-bit Power Architecture technology compliant CPU core complex (e200z0h)
— Compatible with Power Architecture instruction set
— Includes variable length encoding (VLE) instruction set for smaller code size footprint; with
the encoding of mixed 16-bit and 32-bit instructions, it is possible to achieve significant code
size footprint reduction over conventional Book E compliant code
On-chip ECC flash memory with flash controller
— As much as 1 MB primary flash—two 512 KB modules with prefetch buffer and 128-bit data
access port
— 64 KB data flash—separate 416 KB flash block for EEPROM emulation with prefetch buffer
and 128-bit data access port
As much as 48 KB on-chip ECC SRAM with SRAM controller
As much as 160 KB on-chip non-ECC graphics SRAM with SRAM controller
Memory Protection Unit (MPU) with as many as 12 region descriptors and 32-byte region
granularity to provide basic memory access permission
Interrupt Controller (INTC) with as many as 127 peripheral interrupt sources and eight software
interrupts
Two Frequency-Modulated Phase-Locked Loops (FMPLLs)
— Primary FMPLL provides a 64 MHz system clock
— Auxiliary FMPLL is available for use as an alternate, modulated or non-modulated clock
source to eMIOS modules and as alternate clock to the DCU for pixel clock generation
Crossbar switch architecture enables concurrent access of peripherals, flash memory or RAM from
multiple bus masters (AMBA 2.0 v6 AHB)
16-channel Enhanced Direct Memory Access controller (eDMA) with multiple transfer request
sources using a DMA channel multiplexer
Boot Assist Module (BAM) supports internal flash programming via a serial link (FlexCAN or
LINFlex)
Display Control Unit to drive TFT LCD displays
— Includes processing of as many as four planes that can be blended together
— Offers a direct unbuffered hardware bit-blitter of as many as 16 software-configurable dynamic
layers in order to drastically minimize graphic memory requirements and provide fast
animations
— Programmable display resolutions are available up to WVGA
Parallel Data Interface (PDI) for digital video input
LCD segment driver module with two software programmable configurations:
— As many as 40 frontplane drivers and four backplane drivers
PXD10 Microcontroller Data Sheet, Rev. 1
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Freescale Semiconductor
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Microcontroller MCU
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