V
SM
I
TAVM
I
TRMS
I
TSM
V
T0
r
T
=
=
=
=
=
=
4200 V
1920 A
3020 A
32000 A
0.96 V
0.285 mΩ
Ω
Bi-Directional Control Thyristor
5STB 18N4200
Doc. No. 5SYA1040-03 Sep. 01
•
Two thyristors integrated into one wafer
•
Patented free-floating silicon technology
•
Designed for traction, energy and industrial applications
•
Optimum power handling capability
•
Interdigitated amplifying gate.
The electrical and thermal data are valid for one thyristor half of the device.
Blocking
Part Number
V
SM
V
RM
I
SM
I
RM
dV/dt
crit
V
RM
is equal to V
SM
up to T
j
= 110°C
5STB 18N4200
4200 V
4200 V
5STB 18N4000
4000 V
4000 V
≤
400 mA
≤
400 mA
1000 V/µs
5STB 18N3600
3600 V
3600 V
Conditions
f = 5 Hz, t
p
= 10ms
f = 50 Hz,t
p
= 10ms
V
SM
V
RM
T
j
= 125°C
@ Exp. to 0.67xV
SM
Mechanical data
F
M
Mounting force
nom.
min.
max.
a
Acceleration
Device unclamped
Device clamped
m
D
S
D
a
Weight
Surface creepage distance
Air strike distance
50 m/s
2
100 m/s
2
2.9 kg
53 mm
22 mm
90 kN
81 kN
108 kN
ABB Semiconductors AG reserves the right to change specifications without notice.
5STB 18N4200
On-state
I
TAVM
I
TRMS
I
TSM
I
2
t
Max. average on-state
t
Max. RMS on-state current
Max. peak non-repetitive
surge current
Limiting load integral
1920 A
3020 A
32000 A
35000 A
5120 kA
2
s
5000 kA
2
s
V
T
V
T0
r
T
I
H
I
L
On-state voltage
Threshold voltage
Slope resistance
Holding current
1.53 V
0.96 V
0.285 mΩ
50-250 mA
25-150 mA
Latching current
100-500 mA
50-300 mA
T
j
T
j
T
j
T
j
= 25°C
= 125°C
= 25°C
= 125°C
tp
tp
tp
tp
I
T
I
T
=
=
=
=
=
=
10 ms T
j
= 125°C
8.3 ms After surge:
10 ms V
D
= V
R
= 0V
8.3 ms
2000 A
1000 - 3000 A
T
j
= 125°C
Half sine wave, T
C
= 70°C
Switching
di/dt
crit
Critical rate of rise of on-state
current
250 A/µs
500 A/µs
Cont. f = 50 Hz V
D
≤
0.67⋅V
DRM
, T
j
= 125°C
60 sec.
f = 50Hz
V
D
= 0.4⋅V
DRM
I
TRM
= 3000 A
I
FG
= 2 A, t
r
= 0.5 µs
I
FG
= 2 A, t
r
= 0.5 µs
t
d
t
q
Q
rr
Delay time
Turn-off time
≤
≤
min
max
3.0 µs
550 µs
V
D
≤
0.67⋅V
DRM
I
TRM
= 3000 A, T
j
= 125°C
dv
D
/dt = 20V/µs V
R
> 200 V, di
T
/dt = -1.5 A/µs
Recovery charge
2100 µAs
3200 µAs
Triggering
V
GT
I
GT
V
GD
I
GD
V
FGM
I
FGM
V
RGM
P
G
Gate trigger voltage
Gate trigger current
Gate non-trigger voltage
Gate non-trigger current
Peak forward gate voltage
Peak forward gate current
Peak reverse gate voltage
Maximum gate power loss
≤
≤
≥
≥
2.6 V
400 mA
0.3 V
10 mA
12 V
10 A
10 V
3W
T
j
= 25°C
T
j
= 25°C
V
D
= 0.4⋅V
RM
V
D
= 0.4⋅V
RM
T
j
= 125°C
T
j
= 125°C
ABB Semiconductors AG reserves the right to change specifications without notice.
Doc. No. 5SYA1040-03 Sep. 01
page 2 of 5
5STB 18N4200
Thermal
T
j
T
stg
R
thJC
Operating junction temperature range
Storage temperature range
Thermal resistance
junction to case
-40…125 °C
-40…150 °C
22.8 K/kW
22.8 K/kW
11.4 K/kW
R
thCH
Thermal resistance case to
heat sink
Analytical function for transient thermal
impedance:
Anode side cooled
Cathode side cooled
Double side cooled
Single side cooled
Double side cooled
4 K/kW
2 K/kW
Z
thJC
[K/kW]
15
180° sine:
add 1 K/kW
180° rectangular: add 1 K/kW
120° rectangular: add 1 K/kW
60° rectangular: add 2 K/kW
Z
thJC
(t) =
å
R
i
(1 - e
i
=
1
i
R
i
(K/kW)
τ
i
(s)
1
6.77
0.8651
2
2.51
0.1558
3
1.34
0.0212
n
- t/
τ
i
)
4
10
5
F
m
= 81..108 kN
Double-side cooling
0
0.001
BN1
0.78
0.0075
0.010
0.100
1.000
10.000
t [s]
Fig. 1 Transient thermal impedance junction to case.
Fig. 2 On-state characteristics.
Fig. 3 On-state characteristics.
ABB Semiconductors AG reserves the right to change specifications without notice.
Doc. No. 5SYA1040-03 Sep. 01
page 3 of 5
5STB 18N4200
T
case
(°C)
130
Double-sided cooling
125
120
115
110
105
100
95
90
85
80
75
70
0
500
1000
1500
2000
2500
DC
180° rectangular
180° sine
120° rectangular
3000
I
TAV
(A)
Fig. 4 On-state power dissipation vs. mean on-
state current. Turn - on losses excluded.
Fig. 5 Max. permissible case temperature vs.
mean on-state current.
Fig. 6 Surge on-state current vs. pulse length.
Half-sine wave.
Fig. 7 Surge on-state current vs. number of
pulses. Half-sine wave, 10 ms, 50Hz.
ABB Semiconductors AG reserves the right to change specifications without notice.
Doc. No. 5SYA1040-03 Sep. 01
page 4 of 5
5STB 18N4200
5STB 18N4200
Fig. 8 Gate trigger characteristics.
Fig. 9 Max. peak gate power loss.
Fig. 10 Recovery charge vs. decay rate of on-
state current.
Fig. 11 Peak reverse recovery current vs. decay
rate of on-state current.
ABB Semiconductors AG reserves the right to change specifications without notice.
ABB Semiconductors AG
Fabrikstrasse 3
CH-5600 Lenzburg, Switzerland
Telephone
Fax
Email
Internet
+41 (0)62 888 6419
+41 (0)62 888 6306
abbsem@ch.abb.com
www.abbsem.com
Doc. No. 5SYA1040-03 Sep. 01
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