performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields higher
performance and low power consumption devices.
When
CE1
is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation can
be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip Enable
inputs,
CE1
and CE2. The active LOW Write Enable (
WE
)
controls both writing and reading of the memory.
The IS62C1024 is available in 32-pin 600-mil plastic DIP, 525-
mil plastic SOP and TSOP (type 1) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
512 X 2048
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
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Embedded System
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