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SY100S341_07

Description
8-BIT SHIFT REGISTER
File Size85KB,6 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet View All

SY100S341_07 Overview

8-BIT SHIFT REGISTER

Micrel, Inc.
8-BIT SHIFT
REGISTER
DESCRIPTION
SY100S341
SY100S341
FEATURES
s
s
s
s
Max. shift frequency of 600MHz
Max. Clock to Q delay of 1200ps
I
EE
min. of –150mA
Industry standard 100K ECL levels
s
Extended supply voltage option:
V
EE
= –4.2V to –5.5V
s
Voltage and temperature compensation for improved
noise immunity
s
Internal 75k
input pull-down resistors
s
70% faster than Fairchild 300K at lower power
s
Function and pinout compatible with Fairchild F100K
s
Available in 28-pin PLCC package
The SY100S341 offer eight D-type, edge-triggered flip-
flops with both individual inputs for parallel operation as
well as serial inputs for bidirectional shifting, and are
designed for use in high-performance ECL systems. Data
is clocked into the flip-flops on the rising edge of the clock.
The mode of operation is selected by two Select inputs
(S
0
, S
1
) which determine if the device performs a shift, hold
or parallel entry function, as described in the Truth Table.
The inputs on these devices have 75kΩ pull-down resistors.
PIN NAMES
Label
CP
S
0
— S
1
D
0
— D
7
P
0
— P
7
Q
0
— Q
7
V
EES
V
CCA
Function
Clock Pulse Input
Select Inputs
Serial Inputs
Parallel Inputs
Data Outputs
V
EE
Substrate
V
CCO
for ECL Outputs
M9999-042307
hbwhelp@micrel.com or (408) 955-1690
Rev.: I
Amendment: /0
1
Issue Date: April 2007

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