APW7062B
Synchronous Buck PWM Controller
Features
•
•
•
Simple Single-Loop Control Design
- Voltage-Mode PWM Control
Fast Transient Response
- Full 0–100% Duty Ratio
Excellent Output Voltage Regulation
- 0.8V Internal Reference
-
±
1% Over Line Voltage and Temperature
General Description
The APW7062B is a voltage mode, synchronous PWM
controller which drives dual N-Channel MOSFETs. It
integrates the control, monitoring and protection func-
tions into a single package, provides one controlled
power outputs with under-voltage and over-current
protection.
APW7062B provide excellent regulation for output load
variation. An internal 0.8V temperature-compensated
reference voltage is designed to meet the requirement
of low output voltage applications. It includes a 200kHz
free-running triangle-wave oscillator that is adjustable
from 70kHz to 800kHz.
The power-on-reset (POR) circuit monitors the VCC,
EN, OCSET input voltage to start-up or shutdown the
IC. The over-current protection (OCP) monitors the
output current by using the voltage drop across the
upper MOSFET’s R
DS(ON)
, eliminating the need for a
current sensing resistor. The under-voltage protection
(UVP) monitors the voltage of FB pin for short-circuit
protection.
The over-current protection trip cycle the soft-start func-
tion until the fault events be removed. Under-voltage
protection will shutdown the IC directly.
•
•
•
Over Current Fault Monitor
- Uses Upper MOSFETs R
DS (ON)
Converter Can Source and Sink Current
Small Converter Size
- 200kHz Free-Running Oscillator
- Programmable from 70kHz to 800kHz
•
14-Lead SOIC Package
•
Lead Free Available (RoHS Compliant)
Applications
•
•
•
•
Graphic Cards
DDR Memory Power Supply
DDR Memory Termination Voltage
Low-Voltage Distributed Power Supplies
Pinouts
RT
OCSET
SS
COMP
FB
EN
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
PVCC
LGATE
PGND
BOOT
UGATE
PHASE
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright
ANPEC Electronics Corp.
Rev. A.3 - Mar., 2005
1
www.anpec.com.tw
APW7062B
Ordering and Marking Information
APW 7062B
L e a d F re e C o d e
H a n d lin g C o d e
Tem p. R ange
P a ck ag e C o d e
P ackage C ode
K : S O P -1 4
O p e ra tin g J u n c tio n T e m p . R a n g e
C : 0 to 7 0 ° C
H a n d lin g C o d e
TU : Tube
TR : Tape & R eel
L e a d F re e C o d e
L : L e a d F re e D e v ic e
B la n k : O rig in a l D e v ic e
A P W 7062B K :
A P W 7062B
XXXXX
X X X X X - D a te C o d e
Notes： ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate
termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering
operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for
MSL classification at lead-free peak reflow temperature.
Block Diagram
VCC
OCSET
G ND
EN
P ower-O n
Res et
I
O C SET
200uA
vc c
BOOT
UG A T E
I
SS
10uA
SS
5.8V
S oft S tart
O .C.P
Com parator
P HA S E
:
2
50% V
R EF
U.V .P
Com parator
PVCC
PW M
Com parator
G ate C ontrol
LGATE
P G ND
E rror A m p
V
R EF
O s c illator
Triangle
W ave
FB
C O MP
RT
Copyright
ANPEC Electronics Corp.
Rev. A.3 - Mar., 2005
2
www.anpec.com.tw
APW7062B
Application Cicuit
12V
R1
10R
D1
1N4148
R2
10K
R4
NC
1
2
3
4
5
6
7
U1
APW7062B
RT
VCC
OCSET PVCC
SS
LGATE
COMP
PGND
FB
BOOT
EN
UGATE
GND
PHASE
14
13
12
11
10
9
8
C2
C1
1uF
L1
+
C3
470uF
16V
30mR
+
C6
470uF
16V
30mR
1uH
12V
R3
1K
1nF
8
7
6
5
Q1
APM4220
L2
2.2uH
D2
SR24
2A/40V
C5
4.7uF
+
C4
100uF
16V
R5
2R2
C8
0.1uF
4
C7
0.1uF
SHDN
C13
47pF
R10
15K
1
2
3
8
7
6
5
1.2V
R7
NC
C12
8200pF
R6
0R
4
1
2
3
Q2
APM4220
C12
NC
R8
1KF
1%
+
C9
1000uF
6.3V
30mR
+
C10
1000uF
6.3V
30mR
C11
4.7uF
V
OUT
=
V
REF
×
1
+
R8
R9
R9
2KF
1%
Absolute Maximum Ratings
Symbol
V
CC
V
BOOT
V
PHASE
T
STG
T
SDR
V
ESD
VCC to GND
BOOT to GND
PHASE to GND
Operating Junction Temperature
Storage Temperature
Soldering Temperature (10 Seconds)
Minimum ESD Rating
Parameter
Rating
30
30
30
0~150
-65 ~ 150
300
±2
Unit
V
V
V
o
o
o
C
C
C
KV
Copyright
ANPEC Electronics Corp.
Rev. A.3 - Mar., 2005
3
www.anpec.com.tw
APW7062B
Electrical Characteristics
APW7062B
Symbol
Parameter
Test Conditions
EN=V
CC
; UGATE and LGATE
Open
EN=0V
V
OCSET
=4.5V
DC
V
OCSET
=4.5V
DC
V
OCSET
=4.5V
DC
8.8
0.8
1.27
R
T
=OPEN, V
CC
=12
6KΩ < RT to GND < 200KΩ
R
T
=OPEN
-1
0.80
V
BOOT
=12V, V
UGATE
=6V
I
LGATE
=0.3A
P
VCC
=12V, V
LGATE
=6V
I
LGATE
=0.3A
V
OUT
=2.5V, I
OUT
=1A, R
T
=OPEN
550
650
800
4
700
4
50
50
V
OCSET
=4.5V
DC
170
8
200
10
230
12
7
7
170
-15
1.9
+1
200
230
+15
2.0
Min
Typ
2
250
350
10.4
Max
V
CC
SUPPLY CURRENT
I
CC
Nominal Supply
Shutdown Supply
POWER-ON-RESET
Rising V
CC
Threshold
Falling V
CC
Threshold
Enable-Input Threshold
Voltage
Rising V
OCSET
Threshold
OSCILLATOR
Free Running Frequency
Total Variation
∆V
OSC
∆V
REF
V
REF
I
UGATE
R
UGATE
I
LGATE
R
LGATE
T
D
Ramp Amplitude
Reference Voltage Tolerance
PWM Error Amplifier
Upper Gate Source
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
Dead Time
FB Under Voltage
I
OCSET
I
SS
OCSET Current Source
Soft-Start Current
REFERENCE VOLTAGE ACCURANCY
%
V
mA
Ω
mA
Ω
ns
%
µA
µA
kHz
%
V
P-P
V
V
V
V
mA
µA
Unit
GATE DRIVERS
PROTECTION
Copyright
ANPEC Electronics Corp.
Rev. A.3 - Mar., 2005
4
www.anpec.com.tw
APW7062B
Functional Pin Description
RT (Pin1)
This pin can adjust the switching frequency. Connect
a resistor from RT to GND for increasing the switching
frequency:
4.15
×
10
6
F
S
=
200kHz
+
RT
(RT to GND,F
S
=
200kHz to 400kHz)
SS (Pin3)
Connect a capacitor from the pin to GND to set the
soft-start interval of the converter. An internal 10uA
current source charges this capacitor to 5.8V. The
SS voltage clamps the error amplifier output, and Fig-
ure1 shows the soft-start interval. At t
1
, the SS volt-
age reaches the valley of the oscillator’s triangle wave.
The PWM comparator starts to generate a PWM sig-
nal to control logic, and the output is rising rapidly.
Until the output is in regulation at t
2
, the clamp on the
COMP is released. This method provides a rapid and
controlled output voltage rise.
When over current protection occurs, the VOUT is
shutdown, and re-soft-start again, if the over current
condition still exists in soft-start , the VOUT is
shutdowned again, after the SS reaches 4.5V, the SS
is discharged to zero. The soft-start is recurring until
the over current condition is eliminated.
VO L TAGE
V
SOF T STAR T
Conversely, connect a resistor from RT to V
CC
for de-
creasing the switching frequency:
3.51
×
10
7
F
S
=
200kHz -
RT
(RT to V
CC
, F
S
=
200kHz to 75kHz)
OCSET (Pin2)
This pin serves two functions: a shutdown control and
the setting of over current limit threshold. Pulling this
pin below 1.27V will shutdown the controller, forcing
the UGATE and LGATE signals to be at 0V.
A resistor (R
ocset
) connected between this pin and the
drain of the high side MOSFET will determine the over
current limit. An internal 200uA current source will
flow through this resistor, creating a voltage drop,
which will be compared with the voltage across the
high side MOSFET. The threshold of the over current
limit is therefore given by:
V
OU T
V
OSC (M IN )
V
SS=
1 .2 V
Erro r Am p
Ou tp u t
I
PEAK
=
I
OCSET
(
200uA
)
×
R
OCSET
R
DS(ON)
t
0
t
1
t
2
t
3
TIME
To avoid noise interference from switching transient, a
delay time is designed in the OCP comparator.
The over current protection is active only when the
high side MOSFET is turned on longer than 300ns.
FIGURE1. SOFT-START INTERVAL
t
2
=
C
SS
I
SS
×
(
V
OSC(MIN)
+
t
1
)
V
OUT
SteadyState
V
IN
C
t
SoftStart
=
t
3
−
t
2
=
SS
×
I
SS
×
∆
V
OSC
Copyright
ANPEC Electronics Corp.
Rev. A.3 - Mar., 2005
5
www.anpec.com.tw
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