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HYMD564M646CLP6-H

Description
200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP)
Categorystorage    storage   
File Size205KB,20 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
Environmental Compliance
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HYMD564M646CLP6-H Overview

200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP)

HYMD564M646CLP6-H Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerSK Hynix
Parts packaging codeMODULE
package instructionDIMM,
Contacts200
Reach Compliance Codecompli
ECCN codeEAR99
access modeSINGLE BANK PAGE BURST
Maximum access time0.75 ns
Other featuresAUTO/SELF REFRESH
I/O typeCOMMON
JESD-30 codeR-XDMA-N200
memory density2147483648 bi
Memory IC TypeDDR DRAM MODULE
memory width64
Number of functions1
Number of ports1
Number of terminals200
word count33554432 words
character code32000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32MX64
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIMM
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
refresh cycle8192
self refreshYES
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal locationDUAL
Maximum time at peak reflow temperature20
200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP)
This Hynix unbuffered Small Outline, Dual In-Line Memory Module (DIMM) series consists of 512Mb C ver. DDR
SDRAMs in 400mil TSOP II packages on a 200pin glass-epoxy substrate. This Hynix 512Mb C ver. based unbuffered
SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of industry standard. It is
suitable for easy interchange and addition.
FEATURES
JEDEC Standard 200-pin small outline, dual in-line
memory module (SO-DIMM)
Two ranks 64M x 64 organization
2.6V
±
0.1V VDD and VDDQ Power supply for
DDR400, 2.5V
±
0.2V for DDR333 and below
All inputs and outputs are compatible with SSTL_2
interface
Fully differential clock operations (CK & /CK) with
133/166/200MHz
DLL aligns DQ and DQS transition with CK transition
Programmable CAS Latency: DDR266(2, 2.5 clock),
DDR333(2.5 clock), DDR400(3 clock)
Programmable Burst Length 2 / 4 / 8 with both
sequential and interleave mode
Edge-aligned DQS with data outs and Center-aligned
DQS with data inputs
Auto refresh and self refresh supported
8192 refresh cycles / 64ms
Serial Presence Detect (SPD) with EEPROM
Built with 512Mb DDR SDRAMs in 400 mil TSOP II
packages
All lead-free products (RoHS compliant)
ADDRESS TABLE
Organization
256MB
512MB
32M x 64
64M x 64
Ranks
1
2
SDRAMs
32Mb x 16
32Mb x 16
# of
DRAMs
4
8
# of row/bank/column Address
13(A0~A12)/2(BA0,BA1)/10(A0~A9)
13(A0~A12)/2(BA0,BA1)/10(A0~A9)
Refresh
Method
8K / 64ms
8K / 64ms
PERFORMANCE
Part-Number Suffix
Speed Bin
CL - tRCD- tRP
CL=3
Max Clock
Frequency
CL=2.5
CL=2
-D43
1
DDR400B
3-3-3
200
166
133
-J
DDR333
2.5-3-3
-
166
133
-H
DDR266B
2.5-3-3
-
133
133
Unit
-
CK
MHz
MHz
MHz
Note:
1. 2.6V
±
0.1V VDD and VDDQ Power supply for DDR400 and 2.5V
±
0.2V for DDR333 and below
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 1.3 / Feb. 2006
1

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Description 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP) 200pin DDR SDRAM SO-DIMMs based on 512Mb C ver. (TSOP)
Is it Rohs certified? conform to - conform to - conform to conform to conform to conform to conform to conform to
Maker SK Hynix - SK Hynix - SK Hynix SK Hynix SK Hynix SK Hynix SK Hynix SK Hynix
Parts packaging code MODULE - MODULE - MODULE MODULE MODULE MODULE MODULE MODULE
package instruction DIMM, - DIMM, - DIMM, DIMM, DIMM, DIMM, DIMM, DIMM,
Contacts 200 - 200 - 200 200 200 200 200 200
Reach Compliance Code compli - compli - unknow compli compli unknow unknow unknow
ECCN code EAR99 - EAR99 - EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
access mode SINGLE BANK PAGE BURST - SINGLE BANK PAGE BURST - SINGLE BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST
Maximum access time 0.75 ns - 0.7 ns - 0.7 ns 0.7 ns 0.7 ns 0.7 ns 0.75 ns 0.7 ns
Other features AUTO/SELF REFRESH - AUTO/SELF REFRESH - AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
I/O type COMMON - COMMON - COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 code R-XDMA-N200 - R-XDMA-N200 - R-XDMA-N200 R-XDMA-N200 R-XDMA-N200 R-XDMA-N200 R-XDMA-N200 R-XDMA-N200
memory density 2147483648 bi - 2147483648 bi - 2147483648 bi 4294967296 bi 4294967296 bi 4294967296 bi 4294967296 bi 4294967296 bi
Memory IC Type DDR DRAM MODULE - DDR DRAM MODULE - DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE
memory width 64 - 64 - 64 64 64 64 64 64
Number of functions 1 - 1 - 1 1 1 1 1 1
Number of ports 1 - 1 - 1 1 1 1 1 1
Number of terminals 200 - 200 - 200 200 200 200 200 200
word count 33554432 words - 33554432 words - 33554432 words 67108864 words 67108864 words 67108864 words 67108864 words 67108864 words
character code 32000000 - 32000000 - 32000000 64000000 64000000 64000000 64000000 64000000
Operating mode SYNCHRONOUS - SYNCHRONOUS - SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C - 70 °C - 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
organize 32MX64 - 32MX64 - 32MX64 64MX64 64MX64 64MX64 64MX64 64MX64
Output characteristics 3-STATE - 3-STATE - 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material UNSPECIFIED - UNSPECIFIED - UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code DIMM - DIMM - DIMM DIMM DIMM DIMM DIMM DIMM
Package shape RECTANGULAR - RECTANGULAR - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY - MICROELECTRONIC ASSEMBLY - MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius) 260 - 260 - 260 260 260 260 260 260
Certification status Not Qualified - Not Qualified - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
refresh cycle 8192 - 8192 - 8192 8192 8192 8192 8192 8192
self refresh YES - YES - YES YES YES YES YES YES
Maximum supply voltage (Vsup) 2.7 V - 2.7 V - 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
Minimum supply voltage (Vsup) 2.3 V - 2.3 V - 2.3 V 2.5 V 2.3 V 2.5 V 2.3 V 2.3 V
Nominal supply voltage (Vsup) 2.5 V - 2.5 V - 2.5 V 2.6 V 2.5 V 2.6 V 2.5 V 2.5 V
surface mount NO - NO - NO NO NO NO NO NO
technology CMOS - CMOS - CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL - COMMERCIAL - COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form NO LEAD - NO LEAD - NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD
Terminal location DUAL - DUAL - DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 20 - 20 - 20 20 20 20 20 20
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