ST7263BK2M1/xxx datasheet, PDF - EEWORLD Datasheet

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ST7263BK2M1/xxx: DescriptionLow speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and IÂ²C; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，186 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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ST7263BK2M1/xxx Overview

Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and IÂ²C

ST7263BK2M1/xxx Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	SOIC
package instruction	0.300 INCH, ROHS COMPLIANT, PLASTIC, SOP-34
Contacts	34
Reach Compliance Code	compli
Has ADC	YES
Address bus width
bit size	8
CPU series	ST72
maximum clock frequency	24 MHz
DAC channel	NO
DMA channel	YES
External data bus width
JESD-30 code	R-PDSO-G34
JESD-609 code	e4
length	17.894 mm
Number of I/O lines	19
Number of terminals	34
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP34,.4,40
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	384
rom(word)	8192
ROM programmability	MROM
Maximum seat height	2.642 mm
speed	8 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.016 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.5 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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ST7263BHx ST7263BDx

ST7263BKx ST7263BEx

Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM,

DFU capability, 8-bit ADC, WDG, timer, SCI and I²C

Features

■

Memories

– 4, 8, 16 or 32 Kbytes Program memory:

high density Flash (HDFlash), or ROM with

Readout and Write Protection

– In-application Programming (IAP) and in-

circuit programming (ICP)

– 384, 512 or 1024 bytes RAM memory (128-

byte stack)

Clock, reset and supply management

– Run, Wait, Slow and Halt CPU modes

– 12 or 24 MHz oscillator

– RAM retention mode

– Optional low voltage detector (LVD)

Universal serial bus (USB) interface

– DMA for low speed applications compliant

with USB 1.5 Mbs (version 2.0) and HID

specifications (version 1.0)

– Integrated 3.3 V voltage regulator and

transceivers

– Supports USB DFU class specification

– Suspend and Resume operations

– 3 endpoints with programmable In/Out

configuration

Up to 27 I/O ports

– Up to 8 high sink I/Os (10 mA at 1.3 V)

– 2 very high sink true open drain I/Os

(25 mA at 1.5 V)

– Up to 8 lines individually programmable as

interrupt inputs

1 analog peripheral

– 8-bit A/D converter with 8 or 12 channels

2 timers

– Programmable watchdog

– 16-bit timer with 2 input Captures, 2 output

Compares, PWM output and clock input

SDIP32

LQFP48 (7x7)

24

■

1

SO34(Shrink)

■

SO24

QFN40 (6x6)

■

2 communication Interfaces

– Asynchronous serial communications inter-

face

– I²C multimaster interface up to 400 kHz

Instruction set

– 63 basic instructions

– 17 main addressing modes

– 8 x 8 unsigned multiply instruction

– True bit manipulation

Development tools

– Versatile development tools (under

Windows) including assembler, linker, C-

compiler, archiver, source level debugger,

software library, hardware emulator,

programming boards and gang

programmers, HID and DFU software

layers

Device summary

Part number

ST7263BH2, ST7263BH6

ST7263BD6

ST7263BK1, ST7263BK2,

ST7263BK4, ST7263BK6

ST7263BE1, ST7263BE2,

ST7263BE4, ST7263BE6

■

■

■

Table 1.

■

■

Reference

ST7263BHx

ST7263BDx

ST7263BKx

ST7263BEx

June 2009

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1

Contents

ST7263Bxx

Contents

1

2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.1

2.2

2.3

2.4

2.5

RESET

signal (bidirectional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

OSCIN/OSCOUT:

input/output oscillator pin . . . . . . . . . . . . . . . . . . . . . . 13

VDD/VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

VDDA/VSSA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3

4

Register and memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Flash program memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.3.1

Readout protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

ICC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

ICP (in-circuit programming) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

IAP (in-application programming) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Related documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5

Central processing unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.1

5.2

5.3

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

CPU registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6

Reset and clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.1

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.1.1

6.1.2

6.1.3

Low voltage detector (LVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Watchdog reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

External reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.2

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Clock system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

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6.2.1

6.2.2

Contents

General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

External clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

7.1

Interrupt register (ITRFRE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8

Power saving modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.1

8.2

8.3

8.4

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Slow mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

9

I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

9.1

9.2

9.3

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

I/O port implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

9.3.1

9.3.2

9.3.3

9.3.4

9.3.5

9.3.6

Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Related documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

10

11

Miscellaneous register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

On-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

11.1

Watchdog timer (WDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

11.1.1

11.1.2

11.1.3

11.1.4

11.1.5

11.1.6

11.1.7

11.1.8

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Software Watchdog option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Hardware Watchdog option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

11.2

16-bit timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

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11.2.1

11.2.2

11.2.3

11.2.4

11.2.5

11.2.6

11.2.7

ST7263Bxx

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Summary of timer modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

11.3

Serial communications interface (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

11.3.1

11.3.2

11.3.3

11.3.4

11.3.5

11.3.6

11.3.7

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

11.4

USB interface (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

11.4.1

11.4.2

11.4.3

11.4.4

11.4.5

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Programming considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

11.5

I²C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

11.5.1

11.5.2

11.5.3

11.5.4

11.5.5

11.5.6

11.5.7

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

11.6

8-bit A/D converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

11.6.1

11.6.2

11.6.3

11.6.4

11.6.5

11.6.6

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

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Contents

12

Instruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

12.1

ST7 addressing modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

12.1.1

12.1.2

12.1.3

12.1.4

12.1.5

12.1.6

12.1.7

Inherent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

Immediate instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

Direct . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

Indexed (No Offset, Short, Long) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132

Indirect (Short, Long) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

Indirect Indexed (Short, Long) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

Relative mode (Direct, Indirect) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

12.2

Instruction groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

13

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

13.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

13.1.1

13.1.2

13.1.3

13.1.4

13.1.5

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

13.2

13.3

13.4

13.5

13.6

13.7

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

13.3.1

Operating conditions with low voltage detector (LVD) . . . . . . . . . . . . . 141

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142

Clock and timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

13.6.1

Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

13.7.1

13.7.2

13.7.3

Functional EMS (electromagnetic susceptibility) . . . . . . . . . . . . . . . . . 147

Electromagnetic Interference (EMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 148

13.8

13.9

I/O port pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

Control pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156

13.10.1 USB interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

13.10.2 SCI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159

13.10.3 I2C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

13.10 Communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . 158

Doc ID 7516 Rev 8

5/186

ST7263BK2M1/xxx Related Products

	ST7263BK2M1/xxx	ST7263BEx	ST7263BHX_09	ST7263BK1B1/xxx	ST7263BK1M1/xxx	ST7263BK2B1/xxx
Description	Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and IÂ²C	Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and IÂ²C	Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and IÂ²C	Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and IÂ²C	Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and IÂ²C	Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and IÂ²C
Is it lead-free?	Lead free	-	-	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	-	-	conform to	conform to	conform to
Maker	STMicroelectronics	-	-	STMicroelectronics	STMicroelectronics	STMicroelectronics
Parts packaging code	SOIC	-	-	DIP	SOIC	DIP
package instruction	0.300 INCH, ROHS COMPLIANT, PLASTIC, SOP-34	-	-	SDIP, SDIP32,.4	SOP, SOP34,.4,40	0.400 INCH, ROHS COMPLIANT, PLASTIC, DIP-32
Contacts	34	-	-	32	34	32
Reach Compliance Code	compli	-	-	compli	compli	compli
Has ADC	YES	-	-	YES	YES	YES
bit size	8	-	-	8	8	8
CPU series	ST72	-	-	ST72	ST72	ST72
maximum clock frequency	24 MHz	-	-	24 MHz	24 MHz	24 MHz
DAC channel	NO	-	-	NO	NO	NO
DMA channel	YES	-	-	YES	YES	YES
JESD-30 code	R-PDSO-G34	-	-	R-PDIP-T32	R-PDSO-G34	R-PDIP-T32
JESD-609 code	e4	-	-	e3	e4	e3
length	17.894 mm	-	-	27.94 mm	17.894 mm	27.94 mm
Number of I/O lines	19	-	-	19	19	19
Number of terminals	34	-	-	32	34	32
Maximum operating temperature	70 °C	-	-	70 °C	70 °C	70 °C
PWM channel	YES	-	-	YES	YES	YES
Package body material	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	-	-	SDIP	SOP	SDIP
Encapsulate equivalent code	SOP34,.4,40	-	-	SDIP32,.4	SOP34,.4,40	SDIP32,.4
Package shape	RECTANGULAR	-	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	-	-	IN-LINE, SHRINK PITCH	SMALL OUTLINE	IN-LINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	-	-	NOT SPECIFIED	260	NOT SPECIFIED
power supply	5 V	-	-	5 V	5 V	5 V
Certification status	Not Qualified	-	-	Not Qualified	Not Qualified	Not Qualified
RAM (bytes)	384	-	-	384	384	384
rom(word)	8192	-	-	4096	4096	8192
ROM programmability	MROM	-	-	MROM	MROM	MROM
Maximum seat height	2.642 mm	-	-	5.08 mm	2.642 mm	5.08 mm
speed	8 MHz	-	-	8 MHz	8 MHz	8 MHz
Maximum supply voltage	5.5 V	-	-	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4 V	-	-	4 V	4 V	4 V
Nominal supply voltage	5 V	-	-	5 V	5 V	5 V
surface mount	YES	-	-	NO	YES	NO
technology	CMOS	-	-	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	-	-	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	-	-	MATTE TIN	Nickel/Palladium/Gold (Ni/Pd/Au)	MATTE TIN
Terminal form	GULL WING	-	-	THROUGH-HOLE	GULL WING	THROUGH-HOLE
Terminal pitch	1.016 mm	-	-	1.778 mm	1.016 mm	1.778 mm
Terminal location	DUAL	-	-	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	-	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	7.5 mm	-	-	15.24 mm	7.5 mm	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER	-	-	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER

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